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MC74LCX652DT PDF预览

MC74LCX652DT

更新时间: 2024-11-20 23:05:47
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 总线驱动器总线收发器触发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
9页 181K
描述
LOW-VOLTAGE CMOS OCTAL TRANSCEIVER/ REGISTERED TRANSCEIVER WITH DUAL ENABLE

MC74LCX652DT 技术参数

生命周期:Transferred零件包装代码:TSSOP
包装说明:TSSOP, TSSOP24,.25针数:24
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.26Is Samacsys:N
其他特性:INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION控制类型:INDEPENDENT CONTROL
计数方向:BIDIRECTIONAL系列:LVC/LCX/Z
JESD-30 代码:R-PDSO-G24JESD-609代码:e0
长度:7.8 mm负载电容(CL):50 pF
逻辑集成电路类型:REGISTERED BUS TRANSCEIVER最大I(ol):0.024 A
位数:8功能数量:1
端口数量:2端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP24,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH电源:3.3 V
Prop。Delay @ Nom-Sup:7 ns传播延迟(tpd):9.5 ns
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL触发器类型:POSITIVE EDGE
宽度:4.4 mmBase Number Matches:1

MC74LCX652DT 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
The MC74LCX652 is a high performance, non–inverting octal  
transceiver/registered transceiver operating from a 2.7 to 3.6V supply.  
High impedance TTL compatible inputs significantly reduce current  
loading to input drivers while TTL compatible outputs offer improved  
LOW–VOLTAGE CMOS  
OCTAL TRANSCEIVER/  
REGISTERED TRANSCEIVER  
WITH DUAL ENABLE  
switching noise performance. A V specification of 5.5V allows  
I
MC74LCX652 inputs to be safely driven from 5V devices. The  
MC74LCX652 is suitable for memory address driving and all TTL level  
bus oriented transceiver applications.  
Data on the A or B bus will be clocked into the registers as the  
appropriate clock pin goes from a LOW–to–HIGH logic level. Two Output  
Enable pins (OEBA, OEAB) are provided to control the transceiver  
outputs. In the transceiver mode, data present at the high impedance port  
may be stored in either the A or the B register or in both. The select  
controls (SBA, SAB) can multiplex stored and real–time (transparent  
mode) data. In the isolation mode (both outputs disabled), A data may be  
stored in the B register or B data may be stored in the A register. When in  
the real–time mode, it is possible to store data without using the internal  
registers by simultaneously enabling OEAB and OEBA. In this  
configuration, each output reinforces its input (data retention is not  
guaranteed in this mode).  
DW SUFFIX  
24–LEAD PLASTIC SOIC PACKAGE  
CASE 751E–04  
SD SUFFIX  
24–LEAD PLASTIC SSOP PACKAGE  
CASE 940D–03  
Designed for 2.7 to 3.6V V  
CC  
Operation  
5V Tolerant — Interface Capability With 5V TTL Logic  
Supports Live Insertion and Withdrawal  
I  
OFF  
Specification Guarantees High Impedance When V  
= 0V  
CC  
DT SUFFIX  
24–LEAD PLASTIC TSSOP PACKAGE  
CASE 948H–01  
LVTTL Compatible  
LVCMOS Compatible  
24mA Balanced Output Sink and Source Capability  
Near Zero Static Supply Current in All Three Logic States (10µA)  
Substantially Reduces System Power Requirements  
PIN NAMES  
Latchup Performance Exceeds 500mA  
Pins  
Function  
ESD Performance: Human Body Model >2000V; Machine Model >200V  
A0–A7  
B0–B7  
CAB, CBA  
SAB, SBA  
OEBA, OEAB  
Side A Inputs/Outputs  
Side B Inputs/Outputs  
Clock Pulse Inputs  
Select Control Inputs  
Output Enable Inputs  
V
CBA SBA OEBA B0  
B1  
19  
B2  
18  
B3  
17  
B4  
16  
B5  
15  
B6  
14  
B7  
13  
CC  
24  
23  
22  
21  
20  
1
2
3
4
5
6
7
9
11  
8
10  
A6  
12  
CAB SAB OEAB A0  
A1  
A2  
A3  
A4  
A5  
A7 GND  
Figure 1. 24–Lead Pinout (Top View)  
3/97  
Motorola, Inc. 1997  
REV 1  

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