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MC74LCX16374DT PDF预览

MC74LCX16374DT

更新时间: 2024-11-03 23:05:47
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 总线驱动器总线收发器触发器逻辑集成电路光电二极管
页数 文件大小 规格书
6页 127K
描述
LOW-VOLTAGE CMOS 16-BIT D-TYPE FLIP-FLOP

MC74LCX16374DT 技术参数

生命周期:Transferred零件包装代码:TSSOP
包装说明:TSSOP,针数:48
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.15Is Samacsys:N
系列:LVC/LCX/ZJESD-30 代码:R-PDSO-G48
JESD-609代码:e0长度:12.5 mm
逻辑集成电路类型:BUS DRIVER位数:8
功能数量:2端口数量:2
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH传播延迟(tpd):6.5 ns
认证状态:Not Qualified座面最大高度:1.1 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
宽度:6.1 mmBase Number Matches:1

MC74LCX16374DT 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
The MC74LCX16374 is a high performance, non–inverting 16–bit  
D–type flip–flop operating from a 2.7 to 3.6V supply. The device is byte  
controlled. Each byte has separate Output Enable and Clock Pulse  
inputs. These control pins can be tied together for full 16–bit operation.  
High impedance TTL compatible inputs significantly reduce current  
loading to input drivers while TTL compatible outputs offer improved  
LOW–VOLTAGE  
CMOS 16–BIT  
D–TYPE FLIP–FLOP  
switching noise performance. A V specification of 5.5V allows  
I
MC74LCX16374 inputs to be safely driven from 5V devices.  
The MC74LCX16374 consists of 16 edge–triggered flip–flops with  
individual D–type inputs and 5V–tolerant 3–state true outputs. The  
buffered clocks (CPn) and buffered Output Enables (OEn) are common to  
all flip–flops within the respective byte. The flip–flops will store the state of  
individual D inputs that meet the setup and hold time requirements on the  
LOW–to–HIGH Clock (CP) transition. With the OE LOW, the contents of  
the flip–flops are available at the outputs. When the OE is HIGH, the  
outputs go to the high impedance state. The OE input level does not affect  
the operation of the flip–flops.  
DT SUFFIX  
PLASTIC TSSOP PACKAGE  
CASE 1201–01  
Designed for 2.7 to 3.6V V  
CC  
Operation  
6.2ns Maximum t  
pd  
5V Tolerant — Interface Capability With 5V TTL Logic  
Supports Live Insertion and Withdrawal  
I  
OFF  
Specification Guarantees High Impedance When V  
= 0V  
CC  
LVTTL Compatible  
LVCMOS Compatible  
24mA Balanced Output Sink and Source Capability  
PIN NAMES  
Near Zero Static Supply Current in All Three Logic States (20µA)  
Substantially Reduces System Power Requirements  
Pins  
Function  
OEn  
CPn  
D0–D15  
O0–O15  
Output Enable Inputs  
Clock Pulse Inputs  
Inputs  
Latchup Performance Exceeds 500mA  
ESD Performance: Human Body Model >2000V; Machine Model >200V  
Outputs  
11/96  
REV 1  
Motorola, Inc. 1996  

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