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MC74LCX16373DT PDF预览

MC74LCX16373DT

更新时间: 2024-11-03 23:05:47
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 总线驱动器总线收发器锁存器逻辑集成电路光电二极管
页数 文件大小 规格书
6页 127K
描述
LOW-VOLTAGE CMOS 16-BIT TRANSPARENT LATCH

MC74LCX16373DT 技术参数

生命周期:Transferred零件包装代码:TSSOP
包装说明:TSSOP,针数:48
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.14Is Samacsys:N
系列:LVC/LCX/ZJESD-30 代码:R-PDSO-G48
JESD-609代码:e0长度:12.5 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
位数:8功能数量:2
端口数量:2端子数量:48
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
传播延迟(tpd):6.4 ns认证状态:Not Qualified
座面最大高度:1.1 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL宽度:6.1 mm
Base Number Matches:1

MC74LCX16373DT 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
The MC74LCX16373 is a high performance, non–inverting 16–bit  
transparent latch operating from a 2.7 to 3.6V supply. The device is byte  
controlled. Each byte has separate Output Enable and Latch Enable  
inputs. These control pins can be tied together for full 16–bit operation.  
High impedance TTL compatible inputs significantly reduce current  
loading to input drivers while TTL compatible outputs offer improved  
LOW–VOLTAGE  
CMOS 16–BIT  
TRANSPARENT LATCH  
switching noise performance. A V specification of 5.5V allows  
I
MC74LCX16373 inputs to be safely driven from 5V devices.  
The MC74LCX16373 contains 16 D–type latches with 3–state  
5V–tolerant outputs. When the Latch Enable (LEn) inputs are HIGH, data  
on the Dn inputs enters the latches. In this condition, the latches are  
transparent, i.e., a latch output will change state each time its D input  
changes. When LE is LOW, the latches store the information that was  
present on the D inputs a setup time preceding the HIGH–to–LOW  
transition of LE. The 3–state outputs are controlled by the Output Enable  
(OEn) inputs. When OE is LOW, the outputs are enabled. When OE is  
HIGH, the standard outputs are in the high impedance state, but this does  
not interfere with new data entering into the latches.  
DT SUFFIX  
PLASTIC TSSOP PACKAGE  
CASE 1201–01  
Designed for 2.7 to 3.6V V  
CC  
Operation  
5.4ns Maximum t  
pd  
5V Tolerant — Interface Capability With 5V TTL Logic  
Supports Live Insertion and Withdrawal  
I  
OFF  
Specification Guarantees High Impedance When V  
= 0V  
CC  
LVTTL Compatible  
LVCMOS Compatible  
24mA Balanced Output Sink and Source Capability  
PIN NAMES  
Near Zero Static Supply Current in All Three Logic States (20µA)  
Substantially Reduces System Power Requirements  
Pins  
Function  
OEn  
LEn  
D0–D15  
O0–O15  
Output Enable Inputs  
Latch Enable Inputs  
Inputs  
Latchup Performance Exceeds 500mA  
ESD Performance: Human Body Model >2000V; Machine Model >200V  
Outputs  
11/96  
REV 1  
Motorola, Inc. 1996  

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