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MC74LCX16373

更新时间: 2024-11-04 05:22:11
品牌 Logo 应用领域
安森美 - ONSEMI 锁存器
页数 文件大小 规格书
8页 99K
描述
Low−Voltage CMOS 16−Bit Transparent Latch With 5 V−Tolerant Inputs and Outputs (3−State, Non−Inverting)

MC74LCX16373 数据手册

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MC74LCX16373  
Low−Voltage CMOS 16−Bit  
Transparent Latch  
With 5 V−Tolerant Inputs and Outputs  
(3−State, Non−Inverting)  
http://onsemi.com  
The MC74LCX16373 is a high performance, non−inverting 16−bit  
transparent latch operating from a 2.3 V to 3.6 V supply. The device is  
byte controlled. Each byte has separate Output Enable and Latch Enable  
inputs. These control pins can be tied together for full 16−bit operation.  
High impedance TTL compatible inputs significantly reduce current  
loading to input drivers while TTL compatible outputs offer improved  
TSSOP−48  
DT SUFFIX  
CASE 1201  
48  
switching noise performance. A V specification of 5.5 V allows  
I
1
MC74LCX16373 inputs to be safely driven from 5.0 V devices.  
The MC74LCX16373 contains 16 D−type latches with 3−state  
5.0 V−tolerant outputs. When the Latch Enable (LEn) inputs are HIGH,  
data on the Dn inputs enters the latches. In this condition, the latches are  
transparent, i.e., a latch output will change state each time its D input  
changes. When LE is LOW, the latches store the information that was  
present on the D inputs a setup time preceding the HIGH−to−LOW  
transition of LE. The 3−state outputs are controlled by the Output  
Enable (OEn) inputs. When OE is LOW, the outputs are enabled. When  
OE is HIGH, the standard outputs are in the high impedance state, but  
this does not interfere with new data entering into the latches.  
MARKING DIAGRAM  
48  
LCX16373G  
AWLYYWW  
Features  
Designed for 2.3 to 3.6 V V Operation  
CC  
5.4 ns Maximum t  
pd  
1
5.0 V Tolerant − Interface Capability With 5.0 V TTL Logic  
Supports Live Insertion and Withdrawal  
A
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= Pb−Free Package  
I  
Specification Guarantees High Impedance When V = 0 V  
CC  
OFF  
WL  
YY  
WW  
G
LVTTL Compatible  
LVCMOS Compatible  
24 mA Balanced Output Sink and Source Capability  
Near Zero Static Supply Current in All Three Logic States (20 mA)  
Substantially Reduces System Power Requirements  
Latchup Performance Exceeds 500 mA  
ESD Performance: Human Body Model >2000 V;  
Machine Model >200 V  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 3 of this data sheet.  
These are Pb−Free Devices*  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
© Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
August, 2005 − Rev. 6  
MC74LCX16373/D  

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