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MC74LCX125DTR2 PDF预览

MC74LCX125DTR2

更新时间: 2024-11-06 04:37:47
品牌 Logo 应用领域
安森美 - ONSEMI 总线驱动器总线收发器逻辑集成电路光电二极管
页数 文件大小 规格书
8页 71K
描述
Low-Voltage CMOS Quad Buffer With 5 V−Tolerant Inputs and Outputs (3−State, Non−Inverting)

MC74LCX125DTR2 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP14,.25
针数:14Reach Compliance Code:unknown
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:6.82Is Samacsys:N
控制类型:ENABLE LOW系列:LVC/LCX/Z
JESD-30 代码:R-PDSO-G14JESD-609代码:e4
长度:5 mm逻辑集成电路类型:BUS DRIVER
最大I(ol):0.024 A湿度敏感等级:1
位数:1功能数量:4
端口数量:2端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:3.3 V
Prop。Delay @ Nom-Sup:6 ns传播延迟(tpd):7.2 ns
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):2.5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:4.4 mmBase Number Matches:1

MC74LCX125DTR2 数据手册

 浏览型号MC74LCX125DTR2的Datasheet PDF文件第2页浏览型号MC74LCX125DTR2的Datasheet PDF文件第3页浏览型号MC74LCX125DTR2的Datasheet PDF文件第4页浏览型号MC74LCX125DTR2的Datasheet PDF文件第5页浏览型号MC74LCX125DTR2的Datasheet PDF文件第6页浏览型号MC74LCX125DTR2的Datasheet PDF文件第7页 
MC74LCX125  
Low−Voltage CMOS  
Quad Buffer  
With 5 V−Tolerant Inputs and Outputs  
(3−State, Non−Inverting)  
http://onsemi.com  
The MC74LCX125 is a high performance, non−inverting quad  
buffer operating from a 2.3 to 3.6 V supply. High impedance TTL  
compatible inputs significantly reduce current loading to input drivers  
while TTL compatible outputs offer improved switching noise  
MARKING  
DIAGRAMS  
performance. A V specification of 5.5 V allows MC74LCX125 inputs  
I
14  
to be safely driven from 5.0 V devices. The MC74LCX125 is suitable  
for memory address driving and all TTL level bus oriented transceiver  
applications.  
Current drive capability is 24 mA at the outputs. The Output Enable  
(OEn) inputs, when HIGH, disable the outputs by placing them in a  
HIGH Z condition.  
SOIC−14  
D SUFFIX  
CASE 751A  
LCX125G  
AWLYWW  
14  
1
1
Features  
14  
Designed for 2.3 to 3.6 V V Operation  
5.0 V Tolerant − Interface Capability With 5.0 V TTL Logic  
Supports Live Insertion and Withdrawal  
CC  
LCX  
125  
TSSOP−14  
DT SUFFIX  
CASE 948G  
14  
ALYWG  
G
1
1
I  
Specification Guarantees High Impedance When V = 0 V  
OFF  
CC  
LVTTL Compatible  
LVCMOS Compatible  
24 mA Balanced Output Sink and Source Capability  
Near Zero Static Supply Current in all Three Logic States (10 mA)  
Substantially Reduces System Power Requirements  
Latchup Performance Exceeds 500 mA  
A
L, WL  
Y, YY  
= Assembly Location  
= Wafer Lot  
= Year  
W, WW = Work Week  
G
= Pb−Free Package  
= Pb−Free Package  
G
(Note: Microdot may be in either location)  
ESD Performance:  
Human Body Model >2000 V  
Machine Model >200 V  
Pb−Free Packages are Available*  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
May, 2005 − Rev. 5  
MC74LCX125/D  

MC74LCX125DTR2 替代型号

型号 品牌 替代类型 描述 数据表
MC74LCX125DTR2G ONSEMI

类似代替

Low-Voltage CMOS Quad Buffer With 5 V−Tolerant Inputs and Outputs (3−State, No
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