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MC74HCT574ADWR2 PDF预览

MC74HCT574ADWR2

更新时间: 2024-11-22 23:01:35
品牌 Logo 应用领域
安森美 - ONSEMI 总线驱动器总线收发器触发器逻辑集成电路光电二极管
页数 文件大小 规格书
8页 165K
描述
Octal 3-State Noninverting D Flip-Flop with LSTTL-Compatible Inputs

MC74HCT574ADWR2 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOIC-20
针数:20Reach Compliance Code:not_compliant
ECCN代码:3A001.A.2.CHTS代码:8542.39.00.01
风险等级:5.14Is Samacsys:N
系列:HCTJESD-30 代码:R-PDSO-G20
JESD-609代码:e0长度:12.8 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大频率@ Nom-Sup:24000000 Hz最大I(ol):0.006 A
湿度敏感等级:1位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP20,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):240
电源:5 V传播延迟(tpd):45 ns
认证状态:Not Qualified座面最大高度:2.65 mm
子类别:FF/Latches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
触发器类型:POSITIVE EDGE宽度:7.5 mm
Base Number Matches:1

MC74HCT574ADWR2 数据手册

 浏览型号MC74HCT574ADWR2的Datasheet PDF文件第2页浏览型号MC74HCT574ADWR2的Datasheet PDF文件第3页浏览型号MC74HCT574ADWR2的Datasheet PDF文件第4页浏览型号MC74HCT574ADWR2的Datasheet PDF文件第5页浏览型号MC74HCT574ADWR2的Datasheet PDF文件第6页浏览型号MC74HCT574ADWR2的Datasheet PDF文件第7页 
High–Performance Silicon–Gate CMOS  
http://onsemi.com  
The MC74HCT574A is identical in pinout to the LS574. This  
device may be used as a level converter for interfacing TTL or NMOS  
outputs to High Speed CMOS inputs.  
MARKING  
DIAGRAMS  
20  
Data meeting the setup time is clocked to the outputs with the rising  
edge of the Clock. The Output Enable input does not affect the states  
of the flip–flops, but when Output Enable is high, all device outputs  
are forced to the high–impedance state. Thus, data may be stored even  
when the outputs are not enabled.  
PDIP–20  
N SUFFIX  
CASE 738  
MC74HCT574AN  
AWLYYWW  
20  
1
1
20  
The HCT574A is identical in function to the HCT374A but has the  
flip–flop inputs on the opposite side of the package from the outputs to  
facilitate PC board layout.  
SOIC WIDE–20  
DW SUFFIX  
CASE 751D  
HCT574A  
AWLYYWW  
20  
1
Output Drive Capability: 15 LSTTL Loads  
TTL NMOS Compatible Input Levels  
Outputs Directly Interface to CMOS, NMOS and TTL  
Operating Voltage Range: 4.5 to 5.5 V  
Low Input Current: 1.0 µA  
1
A
= Assembly Location  
WL = Wafer Lot  
YY = Year  
WW = Work Week  
In Compliance with the Requirements Defined by JEDEC Standard  
No. 7A  
ORDERING INFORMATION  
Device  
Package  
PDIP–20  
Shipping  
Chip Complexity: 286 FETs or 71.5 Equivalent Gates  
MC74HCT574AN  
1440 / Box  
38 / Rail  
MC74HCT574ADW  
SOIC–WIDE  
MC74HCT574ADWR2 SOIC–WIDE 1000 / Reel  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
March, 2000 – Rev. 8  
MC74HCT574A/D  

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