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MC74HCT573ADTR2G PDF预览

MC74HCT573ADTR2G

更新时间: 2024-11-23 12:18:47
品牌 Logo 应用领域
安森美 - ONSEMI 总线驱动器总线收发器锁存器逻辑集成电路光电二极管
页数 文件大小 规格书
8页 153K
描述
Octal 3-State Noninverting Transparent Latch with LSTTL Compatible Inputs

MC74HCT573ADTR2G 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP-20针数:20
Reach Compliance Code:compliantHTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:5.11
Is Samacsys:N系列:HCT
JESD-30 代码:R-PDSO-G20JESD-609代码:e4
长度:6.5 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.006 A
湿度敏感等级:1位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP20,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:5 VProp。Delay @ Nom-Sup:45 ns
传播延迟(tpd):45 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:4.4 mm
Base Number Matches:1

MC74HCT573ADTR2G 数据手册

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MC74HCT573A  
Octal 3-State Noninverting  
Transparent Latch with  
LSTTL Compatible Inputs  
HighPerformance SiliconGate CMOS  
http://onsemi.com  
MARKING  
The MC74HCT573A is identical in pinout to the LS573. This  
device may be used as a level converter for interfacing TTL or NMOS  
outputs to HighSpeed CMOS inputs.  
These latches appear transparent to data (i.e., the outputs change  
asynchronously) when Latch Enable is high. When Latch Enable goes  
low, data meeting the setup and hold times becomes latched.  
The Output Enable input does not affect the state of the latches, but  
when Output Enable is high, all device outputs are forced to the  
highimpedance state. Thus, data may be latched even when the  
outputs are not enabled.  
DIAGRAMS  
20  
20  
PDIP20  
N SUFFIX  
CASE 738  
MC74HCT573AN  
AWLYYWWG  
1
1
20  
The HCT573A is identical in function to the HCT373A but has the  
Data Inputs on the opposite side of the package from the outputs to  
facilitate PC board layout.  
SOIC20  
DW SUFFIX  
CASE 751D  
20  
HCT573A  
AWLYYWWG  
1
Output Drive Capability: 15 LSTTL Loads  
TTL/NMOSCompatible Input Levels  
Outputs Directly Interface to CMOS, NMOS and TTL  
Operating Voltage Range: 4.5 to 5.5 V  
Low Input Current: 10 mA  
1
20  
HCT  
573A  
ALYWG  
G
TSSOP20  
DT SUFFIX  
CASE 948E  
20  
In Compliance with the Requirements Defined by JEDEC Standard  
1
No. 7 A  
1
Chip Complexity: 234 FETs or 58.5 Equivalent Gates  
— Improved Propagation Delays  
— 50% Lower Quiescent Power  
These Devices are PbFree and are RoHS Compliant  
20  
SOEIAJ20  
F SUFFIX  
CASE 967  
20  
74HCT573A  
AWLYWWG  
1
1
A
WL, L  
YY, Y  
= Assembly Location  
= Wafer Lot  
= Year  
WW, W = Work Week  
G or G  
= PbFree Package  
(Note: Microdot may be in either location)  
ORDERING INFORMATION  
Device  
MC74HCT573ANG  
Package  
Shipping  
PDIP20  
18 / Rail  
MC74HCT573ADWR2G SOIC20 1000 / Reel  
MC74HCT573ADTR2G TSSOP20 2500 / Reel  
MC74HCT573AFELG  
SOEIAJ20 2000 / Reel  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specification  
Brochure, BRD8011/D.  
© Semiconductor Components Industries, LLC, 2011  
1
Publication Order Number:  
June, 2011 Rev. 12  
MC74HCT573A/D  

MC74HCT573ADTR2G 替代型号

型号 品牌 替代类型 描述 数据表
MM74HCT573MTCX ONSEMI

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MM74HCT573MTC ONSEMI

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八路 D 型锁存
M74HCT573TTR STMICROELECTRONICS

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