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MC74HCT245AFELG PDF预览

MC74HCT245AFELG

更新时间: 2024-11-05 05:09:55
品牌 Logo 应用领域
安森美 - ONSEMI 总线驱动器总线收发器逻辑集成电路光电二极管
页数 文件大小 规格书
9页 118K
描述
Octal 3−State Noninverting Bus Transceiver with LSTTL Compatible Inputs

MC74HCT245AFELG 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP20,.3
针数:20Reach Compliance Code:unknown
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:5.08Is Samacsys:N
控制类型:COMMON CONTROL计数方向:BIDIRECTIONAL
系列:HCTJESD-30 代码:R-PDSO-G20
JESD-609代码:e4长度:12.575 mm
逻辑集成电路类型:BUS TRANSCEIVER最大I(ol):0.006 A
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP20,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:5 V
Prop。Delay @ Nom-Sup:33 ns传播延迟(tpd):33 ns
认证状态:Not Qualified座面最大高度:2.05 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
翻译:N/A宽度:5.275 mm
Base Number Matches:1

MC74HCT245AFELG 数据手册

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MC74HCT245A  
Octal 3−State Noninverting  
Bus Transceiver with LSTTL  
Compatible Inputs  
High−Performance Silicon−Gate CMOS  
The MC74HCT245A is identical in pinout to the LS245. This  
device may be used as a level converter for interfacing TTL or NMOS  
outputs to High Speed CMOS inputs.  
http://onsemi.com  
The MC74HCT245A is a 3−state noninverting transceiver that is  
used for 2−way asynchronous communication between data buses.  
The device has an active−low Output Enable pin, which is used to  
place the I/O ports into high−impedance states. The Direction control  
determines whether data flows from A to B or from B to A.  
PDIP−20  
N SUFFIX  
CASE 738  
1
Features  
Output Drive Capability: 15 LSTTL Loads  
TTL/NMOS Compatible Input Levels  
Outputs Directly Interface to CMOS, NMOS and TTL  
Operating Voltage Range: 4.5 V to 5.5 V  
Low Input Current: 1.0 mA  
SOIC−20W  
DW SUFFIX  
CASE 751D  
1
In Compliance with the Requirements Defined by JEDEC Standard  
No. 7A  
TSSOP−20  
DT SUFFIX  
CASE 948E  
Chip Complexity: 304 FETs or 76 Equivalent Gates  
Pb−Free Packages are Available  
1
2
3
4
5
6
7
8
9
18  
17  
16  
15  
14  
13  
12  
11  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
B8  
SOEIAJ−20  
F SUFFIX  
CASE 967  
A
B
DATA  
PORT  
DATA  
PORT  
1
PIN ASSIGNMENT  
1
DIRECTION  
1
2
3
4
5
6
7
8
9
20  
19  
18  
17  
16  
15  
14  
13  
12  
V
CC  
DIRECTION  
PIN 20 = V  
CC  
PIN 10 = GND  
19  
OUTPUT ENABLE  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
OUTPUT ENABLE  
Figure 1. Logic Diagram  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
Design Criteria  
Internal Gate Count*  
Value  
76  
Units  
ea  
Internal Gate Propagation Delay  
Internal Gate Power Dissipation  
1.0  
ns  
5.0  
mW  
pJ  
Speed Power Product  
0.005  
*Equivalent to a two−input NAND gate.  
FUNCTION TABLE  
Control Inputs  
GND 10  
11 B8  
Output Enable Direction  
Operation  
L
L
L
H
X
Data Transmitted from Bus B to Bus A  
Data Transmitted from Bus A to Bus B  
Buses Isolated (High−Impedance State)  
ORDERING INFORMATION  
See detailed ordering, shipping information, and marking  
information in the package dimensions section on page 6 of  
this data sheet.  
H
X = Don’t Care  
©
Semiconductor Components Industries, LLC, 2007  
1
Publication Order Number:  
January, 2007 − Rev. 10  
MC74HCT245A/D  

MC74HCT245AFELG 替代型号

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MM74HCT245SJX FAIRCHILD

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