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MC74HC74AFELG PDF预览

MC74HC74AFELG

更新时间: 2024-11-20 04:00:55
品牌 Logo 应用领域
安森美 - ONSEMI 触发器
页数 文件大小 规格书
9页 179K
描述
Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS

MC74HC74AFELG 数据手册

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MC74HC74A  
Dual D Flip−Flop with Set  
and Reset  
HighPerformance SiliconGate CMOS  
The MC74HC74A is identical in pinout to the LS74. The device  
inputs are compatible with standard CMOS outputs; with pullup  
resistors, they are compatible with LSTTL outputs.  
This device consists of two D flipflops with individual Set, Reset,  
and Clock inputs. Information at a Dinput is transferred to the  
corresponding Q output on the next positive going edge of the clock  
input. Both Q and Q outputs are available from each flipflop. The Set  
and Reset inputs are asynchronous.  
http://onsemi.com  
MARKING  
DIAGRAMS  
14  
1
PDIP14  
N SUFFIX  
CASE 646  
MC74HC74AN  
AWLYYWWG  
14  
Features  
1
Output Drive Capability: 10 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 2.0 to 6.0 V  
14  
SOIC14  
D SUFFIX  
CASE 751A  
HC74AG  
AWLYWW  
Low Input Current: 1.0 mA  
14  
High Noise Immunity Characteristic of CMOS Devices  
In Compliance with the JEDEC Standard No. 7.0 A Requirements  
Chip Complexity: 128 FETs or 32 Equivalent Gates  
PbFree Packages are Available  
1
1
14  
HC  
74A  
ALYWG  
G
TSSOP14  
DT SUFFIX  
CASE 948G  
14  
1
1
14  
SOEIAJ14  
F SUFFIX  
CASE 965  
74HC74A  
ALYWG  
14  
1
1
A
L, WL  
Y, YY  
= Assembly Location  
= Wafer Lot  
= Year  
W, WW = Work Week  
G or G  
= PbFree Package  
(Note: Microdot may be in either location)  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
October, 2006 Rev. 11  
MC74HC74A/D  

MC74HC74AFELG 替代型号

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