5秒后页面跳转
MC74HC74AFEL PDF预览

MC74HC74AFEL

更新时间: 2024-11-20 04:00:55
品牌 Logo 应用领域
安森美 - ONSEMI 触发器锁存器逻辑集成电路光电二极管
页数 文件大小 规格书
9页 179K
描述
Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS

MC74HC74AFEL 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP14,.3
针数:14Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.14
系列:HC/UHJESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:10.2 mm
负载电容(CL):50 pF逻辑集成电路类型:D FLIP-FLOP
最大频率@ Nom-Sup:20000000 Hz最大I(ol):0.004 A
位数:1功能数量:2
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C输出极性:COMPLEMENTARY
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP14,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:2/6 V
传播延迟(tpd):150 ns认证状态:Not Qualified
座面最大高度:2.05 mm子类别:FF/Latches
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:5.275 mm最小 fmax:24 MHz
Base Number Matches:1

MC74HC74AFEL 数据手册

 浏览型号MC74HC74AFEL的Datasheet PDF文件第2页浏览型号MC74HC74AFEL的Datasheet PDF文件第3页浏览型号MC74HC74AFEL的Datasheet PDF文件第4页浏览型号MC74HC74AFEL的Datasheet PDF文件第5页浏览型号MC74HC74AFEL的Datasheet PDF文件第6页浏览型号MC74HC74AFEL的Datasheet PDF文件第7页 
MC74HC74A  
Dual D Flip−Flop with Set  
and Reset  
HighPerformance SiliconGate CMOS  
The MC74HC74A is identical in pinout to the LS74. The device  
inputs are compatible with standard CMOS outputs; with pullup  
resistors, they are compatible with LSTTL outputs.  
This device consists of two D flipflops with individual Set, Reset,  
and Clock inputs. Information at a Dinput is transferred to the  
corresponding Q output on the next positive going edge of the clock  
input. Both Q and Q outputs are available from each flipflop. The Set  
and Reset inputs are asynchronous.  
http://onsemi.com  
MARKING  
DIAGRAMS  
14  
1
PDIP14  
N SUFFIX  
CASE 646  
MC74HC74AN  
AWLYYWWG  
14  
Features  
1
Output Drive Capability: 10 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 2.0 to 6.0 V  
14  
SOIC14  
D SUFFIX  
CASE 751A  
HC74AG  
AWLYWW  
Low Input Current: 1.0 mA  
14  
High Noise Immunity Characteristic of CMOS Devices  
In Compliance with the JEDEC Standard No. 7.0 A Requirements  
Chip Complexity: 128 FETs or 32 Equivalent Gates  
PbFree Packages are Available  
1
1
14  
HC  
74A  
ALYWG  
G
TSSOP14  
DT SUFFIX  
CASE 948G  
14  
1
1
14  
SOEIAJ14  
F SUFFIX  
CASE 965  
74HC74A  
ALYWG  
14  
1
1
A
L, WL  
Y, YY  
= Assembly Location  
= Wafer Lot  
= Year  
W, WW = Work Week  
G or G  
= PbFree Package  
(Note: Microdot may be in either location)  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
October, 2006 Rev. 11  
MC74HC74A/D  

与MC74HC74AFEL相关器件

型号 品牌 获取价格 描述 数据表
MC74HC74AFELG ONSEMI

获取价格

Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS
MC74HC74AFG ONSEMI

获取价格

Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS
MC74HC74AN MOTOROLA

获取价格

Dual D Flip-Flop with Set and Reset
MC74HC74AN ONSEMI

获取价格

Dual D Flip-Flop with Set and Reset
MC74HC74AND MOTOROLA

获取价格

暂无描述
MC74HC74ANDS MOTOROLA

获取价格

IC,FLIP-FLOP,DUAL,D TYPE,HC-CMOS,DIP,14PIN,PLASTIC
MC74HC74ANG ONSEMI

获取价格

Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS
MC74HC74D ONSEMI

获取价格

IC HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, S
MC74HC74DR2 MOTOROLA

获取价格

D Flip-Flop, 2-Func, Positive Edge Triggered, CMOS, PDSO14,
MC74HC74DR2 ONSEMI

获取价格

IC IC,FLIP-FLOP,DUAL,D TYPE,HC-CMOS,SOP,14PIN,PLASTIC, FF/Latch