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MC74HC573ADTR2G PDF预览

MC74HC573ADTR2G

更新时间: 2024-11-21 05:09:55
品牌 Logo 应用领域
安森美 - ONSEMI 总线驱动器总线收发器锁存器逻辑集成电路光电二极管
页数 文件大小 规格书
8页 118K
描述
Octal 3−State Noninverting Transparent Latch High−Performance Silicon−Gate CMOS

MC74HC573ADTR2G 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:TSSOP
包装说明:ROHS COMPLIANT, TSSOP-20针数:20
Reach Compliance Code:compliantHTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:0.59
Is Samacsys:N系列:HC/UH
JESD-30 代码:R-PDSO-G20JESD-609代码:e4
长度:6.5 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.006 A
湿度敏感等级:1位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP20,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:2/6 VProp。Delay @ Nom-Sup:45 ns
传播延迟(tpd):240 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:FF/Latches
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:4.4 mm
Base Number Matches:1

MC74HC573ADTR2G 数据手册

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MC74HC573A  
Octal 3−State Noninverting  
Transparent Latch  
High−Performance Silicon−Gate CMOS  
The MC74HC573A is identical in pinout to the LS573. The devices  
are compatible with standard CMOS outputs; with pullup resistors,  
they are compatible with LSTTL outputs.  
http://onsemi.com  
MARKING  
These latches appear transparent to data (i.e., the outputs change  
asynchronously) when Latch Enable is high. When Latch Enable goes  
low, data meeting the setup and hold time becomes latched.  
The HC573A is identical in function to the HC373A but has the data  
inputs on the opposite side of the package from the outputs to facilitate  
PC board layout.  
DIAGRAMS  
20  
20  
PDIP−20  
N SUFFIX  
CASE 738  
MC74HC573AN  
AWLYYWWG  
1
1
Features  
Output Drive Capability: 15 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS and TTL  
Operating Voltage Range: 2.0 to 6.0 V  
20  
SOIC−20  
20  
74HC573A  
AWLYYWWG  
DW SUFFIX  
CASE 751D  
Low Input Current: 1.0 mA  
1
In Compliance with the JEDEC Standard No. 7.0 A Requirements  
Chip Complexity: 218 FETs or 54.5 Equivalent Gates  
Pb−Free Packages are Available*  
1
20  
HC  
573A  
ALYWG  
G
TSSOP−20  
DT SUFFIX  
CASE 948E  
20  
1
1
20  
SOEIAJ−20  
F SUFFIX  
CASE 967  
20  
74HC573A  
AWLYWWG  
1
1
A
WL, L  
YY, Y  
= Assembly Location  
= Wafer Lot  
= Year  
WW, W = Work Week  
G
= Pb−Free Package  
= Pb−Free Package  
G
(Note: Microdot may be in either location)  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 2 of this data sheet.  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
July, 2005 − Rev. 11  
MC74HC573A/D  

MC74HC573ADTR2G 替代型号

型号 品牌 替代类型 描述 数据表
MC74HC573ADTG ONSEMI

完全替代

Octal 3−State Noninverting Transparent Latch High−Performance Silicon−Ga
MC74HC573ADTR2 ONSEMI

完全替代

Octal 3-State Noninverting Transparent Latch
MC74HC573ADT ONSEMI

完全替代

Octal 3-State Noninverting Transparent Latch

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