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MC74HC4051ADR2 PDF预览

MC74HC4051ADR2

更新时间: 2024-11-20 23:01:35
品牌 Logo 应用领域
安森美 - ONSEMI 解复用器开关复用器或开关信号电路光电二极管
页数 文件大小 规格书
16页 403K
描述
Analog Multiplexers/Demultiplexers

MC74HC4051ADR2 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP16,.25
针数:16Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:6.95Is Samacsys:N
其他特性:ALSO OPERATES WITH 2V TO 12V (VCC-VEE) SUPPLY模拟集成电路 - 其他类型:SINGLE-ENDED MULTIPLEXER
JESD-30 代码:R-PDSO-G16JESD-609代码:e0
长度:9.9 mm湿度敏感等级:1
负电源电压最大值(Vsup):-6 V负电源电压最小值(Vsup):
标称负供电电压 (Vsup):-4.5 V信道数量:8
功能数量:1端子数量:16
标称断态隔离度:40 dB通态电阻匹配规范:18 Ω
最大通态电阻 (Ron):170 Ω最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):240电源:2/6,GND/-6 V
认证状态:Not Qualified座面最大高度:1.75 mm
最大信号电流:0.025 A子类别:Multiplexer or Switches
最大供电电流 (Isup):0.08 mA最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):4.5 V
表面贴装:YES最长断开时间:76 ns
最长接通时间:83 ns切换:BREAK-BEFORE-MAKE
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn80Pb20)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:3.9 mm
Base Number Matches:1

MC74HC4051ADR2 数据手册

 浏览型号MC74HC4051ADR2的Datasheet PDF文件第2页浏览型号MC74HC4051ADR2的Datasheet PDF文件第3页浏览型号MC74HC4051ADR2的Datasheet PDF文件第4页浏览型号MC74HC4051ADR2的Datasheet PDF文件第5页浏览型号MC74HC4051ADR2的Datasheet PDF文件第6页浏览型号MC74HC4051ADR2的Datasheet PDF文件第7页 
http://onsemi.com  
High–Performance Silicon–Gate CMOS  
MARKING  
DIAGRAMS  
The MC74HC4051A, MC74HC4052A and MC74HC4053A utilize  
silicon–gate CMOS technology to achieve fast propagation delays,  
low ON resistances, and low OFF leakage currents. These analog  
multiplexers/demultiplexers control analog voltages that may vary  
16  
PDIP–16  
N SUFFIX  
CASE 648  
HC405xAN  
AWLYYWW  
16  
across the complete power supply range (from V  
to V ).  
CC  
EE  
1
The HC4051A, HC4052A and HC4053A are identical in pinout to  
the metal–gate MC14051AB, MC14052AB and MC14053AB. The  
Channel–Select inputs determine which one of the Analog  
Inputs/Outputs is to be connected, by means of an analog switch, to the  
Common Output/Input. When the Enable pin is HIGH, all analog  
switches are turned off.  
1
16  
SO–16  
D SUFFIX  
CASE 751B  
HC405xAD  
AWLYYWW  
16  
16  
1
1
The Channel–Select and Enable inputs are compatible with standard  
CMOS outputs; with pullup resistors they are compatible with LSTTL  
outputs.  
16  
SO–16 WIDE  
DW SUFFIX  
CASE 751G  
HC405xA  
AWLYWW  
These devices have been designed so that the ON resistance (R ) is  
on  
more linear over input voltage than R of metal–gate CMOS analog  
on  
1
1
1
switches.  
16  
For a multiplexer/demultiplexer with injection current protection,  
see HC4851A and HC4852A.  
Fast Switching and Propagation Speeds  
Low Crosstalk Between Switches  
Diode Protection on All Inputs/Outputs  
HC40  
5xA  
ALYW  
TSSOP–16  
DT SUFFIX  
CASE 948F  
16  
1
16  
1
Analog Power Supply Range (V  
– V ) = 2.0 to 12.0 V  
CC  
EE  
SOEIAJ–16  
F SUFFIX  
CASE 966  
74HC405xA  
ALYW  
Digital (Control) Power Supply Range (V  
CC  
– GND) = 2.0 to 6.0 V  
16  
Improved Linearity and Lower ON Resistance Than Metal–Gate  
1
Counterparts  
Low Noise  
A
= Assembly Location  
WL = Wafer Lot  
YY = Year  
In Compliance With the Requirements of JEDEC Standard No. 7A  
Chip Complexity: HC4051A — 184 FETs or 46 Equivalent Gates  
HC4052A — 168 FETs or 42 Equivalent Gates  
WW = Work Week  
HC4053A — 156 FETs or 39 Equivalent Gates  
ORDERING INFORMATION  
Seedetailedorderingandshippinginformationinthepackage  
dimensions section on page 13 of this data sheet.  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
March, 2000 – Rev. 1  
MC74HC4051A/D  

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