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MC74HC4049

更新时间： 2024-02-27 15:25:09

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		/
页数	文件大小	规格书
6页	181K
描述
Hex Buffers/Logic-Level Down Converters

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技术参数
数据手册

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MC74HC4049 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
包装说明：	DIP, DIP16,.3	Reach Compliance Code：	unknown
风险等级：	5.9	JESD-30 代码：	R-PDIP-T16
JESD-609代码：	e0	逻辑集成电路类型：	INVERTER
端子数量：	16	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	DIP	封装等效代码：	DIP16,.3
封装形状：	RECTANGULAR	封装形式：	IN-LINE
电源：	2/6 V	施密特触发器：	NO
子类别：	Gates	表面贴装：	NO
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	THROUGH-HOLE
端子节距：	2.54 mm	端子位置：	DUAL
Base Number Matches：	1

MC74HC4049 数据手册

SEMICONDUCTOR TECHNICAL DATA

High–Performance Silicon–Gate CMOS

The MC54/74HC4049 consists of six inverting buffers, and the

MC54/74HC4050 consists of six noninverting buffers. They are identical in

pinout to the MC14049UB and MC14050B metal–gate CMOS buffers. The

device inputs are compatible with standard CMOS outputs; with pullup

resistors, they are compatible with LSTTL outputs.

J SUFFIX

CERAMIC PACKAGE

CASE 620–10

The input protection circuitry on these devices has been modified by

eliminating the V

diodes to allow the use of input voltages up to 15 volts.

N SUFFIX

PLASTIC PACKAGE

CASE 648–08

Thus, the devices may be used as logic–level translators that convert from a

high voltage to a low voltage while operating at the low–voltage power

supply. They allow MC14000–series CMOS operating up to 15 volts to be

interfaced with High–Speed CMOS at 2 to 6 volts. The protection diodes to

GND are Zener diodes, which protect the inputs from both positive and

negative voltage transients.

D SUFFIX

SOIC PACKAGE

CASE 751B–05

•

Output Drive Capability: 10 LSTTL Loads

Outputs Directly Interface to CMOS, NMOS, and TTL

Operating Voltage Range: 2 to 6 V

Low Input Current: 5 µA

ORDERING INFORMATION

High Noise Immunity Characteristic of CMOS Devices

In Compliance with the Requirements Defined by JEDEC Standard

No. 7A

MC54HCXXXXJ

MC74HCXXXXN

MC74HCXXXXD

Ceramic

Plastic

SOIC

•

Chip Complexity: 36 FETs or 9 Equivalent Gates (4049)

24 FETs or 6 Equivalent Gates (4050)

PIN ASSIGNMENT

LOGIC DIAGRAMS

HC4049

HC4050

(INVERTING BUFFER)

(NONINVERTING BUFFER)

GND

NC = NO CONNECTION

FUNCTION TABLE

Y Outputs

Input

HC4049 HC4060

PIN 1 = V

PIN 8 = GND

PINS 13, 16 = NO CONNECTION

10/95

REV 6

Motorola, Inc. 1995

12 3 4 5 6

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MC74HC4049D	MOTOROLA	Hex Buffers/Logic-Level Down Converters	获取价格
MC74HC4049DD	MOTOROLA	HC/UH SERIES, HEX 1-INPUT INVERT GATE, PDSO16, SOIC-16	获取价格
MC74HC4049DDR2	MOTOROLA	HC/UH SERIES, HEX 1-INPUT INVERT GATE, PDSO16, SOIC-16	获取价格
MC74HC4049DDS	MOTOROLA	Inverter, CMOS, PDSO16	获取价格
MC74HC4049DR2	MOTOROLA	Inverter, HC/UH Series, 6-Func, 1-Input, CMOS, PDSO16, PLASTIC, SOIC-16	获取价格
MC74HC4049DS	MOTOROLA	暂无描述	获取价格