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MC74HC366AD PDF预览

MC74HC366AD

更新时间: 2024-11-27 23:01:35
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摩托罗拉 - MOTOROLA /
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6页 155K
描述
Hex 3-State Inverting Buffer with Common Enables

MC74HC366AD 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
N SUFFIX  
PLASTIC PACKAGE  
16–LEAD  
High–Performance Silicon–Gate CMOS  
CASE 648–08  
The MC74HC366A is identical in pinout to the LS366. The device inputs  
are compatible with standard CMOS outputs; with pullup resistors, they are  
compatible with LSTTL outputs.  
This device is a high–speed hex buffer with 3–state outputs and two  
common active–low Output Enables. When either of the enables is high, the  
buffer outputs are placed into high–impedance states. The HC366A has  
inverting outputs.  
D SUFFIX  
SOIC PACKAGE  
16–LEAD  
CASE 751B–05  
DT SUFFIX  
TSSOP PACKAGE  
16–LEAD  
Output Drive Capability: 15 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 2 to 6 V  
CASE 948F–01  
ORDERING INFORMATION  
Low Input Current: 1 µA  
MC74HCXXXAN  
MC74HCXXXAD  
MC74HCXXXADT  
Plastic  
SOIC  
TSSOP  
High Noise Immunity Characteristic of CMOS Devices  
In Compliance with the Requirements Defined by JEDEC Standard  
No. 7A  
Chip Complexity: 78 FETs or 19.5 Equivalent Gates  
PIN ASSIGNMENT  
LOGIC DIAGRAM  
OUTPUT  
1
2
16  
15  
V
CC  
OUTPUT  
ENABLE 2  
ENABLE 1  
2
4
3
5
A0  
A0  
A1  
Y0  
Y1  
Y0  
A1  
3
4
5
6
7
8
14  
13  
12  
11  
10  
9
A5  
Y5  
A4  
Y4  
A3  
Y3  
Y1  
6
7
9
A2  
A3  
Y2  
Y3  
A2  
Y2  
10  
GND  
12  
14  
11  
13  
A4  
A5  
Y4  
Y5  
FUNCTION TABLE  
Inputs  
Output  
Y
1
OUTPUT ENABLE 1  
OUTPUT ENABLE 2  
PIN 16 = V  
CC  
PIN 8 = GND  
Enable Enable  
15  
1
2
A
L
L
H
X
L
L
X
H
L
H
X
X
H
L
Z
Z
X = don’t care  
Z = high impedance  
This document contains information on a product under development. Motorola reserves the right to change or  
discontinue this product without notice.  
1/97  
REV 0  
Motorola, Inc. 1997  

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