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MC74HC365N PDF预览

MC74HC365N

更新时间: 2024-11-27 23:01:35
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 总线驱动器总线收发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
6页 201K
描述
Hex 3-State Noninverting Buffer with Common Enables

MC74HC365N 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP,
针数:16Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.22
其他特性:WITH DUAL OUTPUT ENABLE系列:HC/UH
JESD-30 代码:R-PDIP-T16JESD-609代码:e0
长度:19.175 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER位数:6
功能数量:1端口数量:2
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
传播延迟(tpd):36 ns认证状态:Not Qualified
座面最大高度:4.44 mm最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mmBase Number Matches:1

MC74HC365N 数据手册

 浏览型号MC74HC365N的Datasheet PDF文件第2页浏览型号MC74HC365N的Datasheet PDF文件第3页浏览型号MC74HC365N的Datasheet PDF文件第4页浏览型号MC74HC365N的Datasheet PDF文件第5页浏览型号MC74HC365N的Datasheet PDF文件第6页 
SEMICONDUCTOR TECHNICAL DATA  
J SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
High–Performance Silicon–Gate CMOS  
16  
16  
The MC54/74HC365 is identical in pinout to the LS365. The device inputs  
are compatible with standard CMOS outputs; with pullup resistors, they are  
compatible with LSTTL outputs.  
This device is a high–speed hex buffer with 3–state outputs and two  
common active–low Output Enables. When either of the enables is high, the  
buffer outputs are placed into high–impedance states. The HC365 has  
noninverting outputs.  
1
N SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
1
Output Drive Capability: 15 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 2 to 6 V  
DT SUFFIX  
TSSOP PACKAGE  
CASE 948F–01  
Low Input Current: 1 µA  
16  
High Noise Immunity Characteristic of CMOS Devices  
In Compliance with the Requirements Defined by JEDEC Standard  
No. 7A  
1
ORDERING INFORMATION  
Chip Complexity: 90 FETs or 22.5 Equivalent Gates  
MC54HCXXXJ  
Ceramic  
Plastic  
TSSOP  
MC74HCXXXN  
MC74HCXXXDT  
LOGIC DIAGRAM  
2
3
5
7
A0  
A1  
A2  
A3  
A4  
A5  
Y0  
Y1  
Y2  
Y3  
Y4  
Y5  
PIN ASSIGNMENT  
OUTPUT  
4
1
2
16  
15  
V
CC  
OUTPUT  
ENABLE 2  
ENABLE 1  
A0  
6
Y0  
A1  
3
4
5
6
7
8
14  
13  
12  
11  
10  
9
A5  
Y5  
A4  
Y4  
A3  
Y3  
10  
12  
14  
9
Y1  
A2  
11  
13  
Y2  
GND  
1
15  
OUTPUT ENABLE 1  
OUTPUT ENABLE 2  
PIN 16 = V  
PIN 8 = GND  
CC  
FUNCTION TABLE  
Inputs  
Output  
Y
Enable Enable  
1
2
A
L
L
H
X
L
L
X
H
L
H
X
X
L
H
Z
Z
X = don’t care  
Z = high impedance  
10/95  
REV 6  
Motorola, Inc. 1995  

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