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MC74HC30N PDF预览

MC74HC30N

更新时间: 2024-11-01 23:01:35
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 栅极逻辑集成电路光电二极管
页数 文件大小 规格书
5页 146K
描述
8-Input NAND Gate

MC74HC30N 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP,
针数:14Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.21
Is Samacsys:N系列:HC/UH
JESD-30 代码:R-PDIP-T14JESD-609代码:e0
长度:18.86 mm负载电容(CL):50 pF
逻辑集成电路类型:NAND GATE功能数量:1
输入次数:8端子数量:14
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED传播延迟(tpd):53 ns
认证状态:Not Qualified座面最大高度:4.69 mm
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.62 mm
Base Number Matches:1

MC74HC30N 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
High–Performance Silicon–Gate CMOS  
N SUFFIX  
PLASTIC PACKAGE  
CASE 646–06  
The MC74HC30 is identical in pinout to the LS30. The device inputs are  
compatible with standard CMOS outputs; with pullup resistors, they are  
compatible with LSTTL outputs.  
14  
1
Output Drive Capability: 10 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 2 to 6 V  
D SUFFIX  
14  
SOIC PACKAGE  
CASE 751A–03  
Low Input Current: 1 µA  
1
High Noise Immunity Characteristic of CMOS Devices  
In Compliance with the Requirements Defined by JEDEC Standard  
No. 7A  
ORDERING INFORMATION  
Chip Complexity: 32 FETs or 8 Equivalent Gates  
MC74HCXXN  
MC74HCXXD  
Plastic  
SOIC  
LOGIC DIAGRAM  
PIN ASSIGNMENT  
A
B
1
2
14  
13  
V
CC  
1
A
2
NC  
B
3
C
4
C
D
3
4
12  
11  
H
G
D
E
F
G
H
8
5
6
11  
12  
Y
Y = ABCDEFGH  
E
F
5
6
10  
9
NC  
NC  
GND  
7
8
Y
PINS 9, 10, 13 = NO CONNECTION  
NC = NO CONNECTION  
PIN 14 = V  
CC  
PIN 7 = GND  
FUNCTION TABLE  
Output  
Y
Inputs A through H  
All inputs H  
L
One or more inputs L  
H
10/95  
REV 6  
Motorola, Inc. 1995  

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