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MC74HC138ADR2G PDF预览

MC74HC138ADR2G

更新时间: 2024-11-24 05:22:15
品牌 Logo 应用领域
安森美 - ONSEMI 解码器驱动器解复用器逻辑集成电路光电二极管PC
页数 文件大小 规格书
10页 117K
描述
1−of−8 Decoder/ Demultiplexer

MC74HC138ADR2G 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:SOIC
包装说明:HALOGEN FREE AND ROHS COMPLIANT, SOIC-16针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:0.43Samacsys Confidence:3
Samacsys Status:ReleasedSamacsys PartID:225419
Samacsys Pin Count:16Samacsys Part Category:Integrated Circuit
Samacsys Package Category:Small Outline PackagesSamacsys Footprint Name:SOIC-16 CASE751B-05
Samacsys Released Date:2015-08-11 08:36:16Is Samacsys:N
系列:HC/UH输入调节:STANDARD
JESD-30 代码:R-PDSO-G16JESD-609代码:e3
长度:9.9 mm负载电容(CL):50 pF
逻辑集成电路类型:OTHER DECODER/DRIVER最大I(ol):0.004 A
湿度敏感等级:1功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:2/6 V
Prop。Delay @ Nom-Sup:41 ns传播延迟(tpd):205 ns
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:Decoder/Drivers最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:3.9 mmBase Number Matches:1

MC74HC138ADR2G 数据手册

 浏览型号MC74HC138ADR2G的Datasheet PDF文件第2页浏览型号MC74HC138ADR2G的Datasheet PDF文件第3页浏览型号MC74HC138ADR2G的Datasheet PDF文件第4页浏览型号MC74HC138ADR2G的Datasheet PDF文件第5页浏览型号MC74HC138ADR2G的Datasheet PDF文件第6页浏览型号MC74HC138ADR2G的Datasheet PDF文件第7页 
MC74HC138A  
1−of−8 Decoder/  
Demultiplexer  
High−Performance Silicon−Gate CMOS  
The MC74HC138A is identical in pinout to the LS138. The device  
inputs are compatible with standard CMOS outputs; with pullup  
resistors, they are compatible with LSTTL outputs.  
http://onsemi.com  
MARKING  
The HC138A decodes a three−bit Address to one−of−eight  
active−low outputs. This device features three Chip Select inputs, two  
active−low and one active−high to facilitate the demultiplexing,  
cascading, and chip−selecting functions. The demultiplexing function  
is accomplished by using the Address inputs to select the desired  
device output; one of the Chip Selects is used as a data input while the  
other Chip Selects are held in their active states.  
DIAGRAMS  
16  
PDIP−16  
N SUFFIX  
CASE 648  
MC74HC138AN  
AWLYYWWG  
16  
1
1
Features  
16  
Output Drive Capability: 10 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS and TTL  
Operating Voltage Range: 2.0 to 6.0 V  
SOIC−16  
D SUFFIX  
CASE 751B  
HC138AG  
AWLYWW  
16  
1
1
Low Input Current: 1.0 mA  
High Noise Immunity Characteristic of CMOS Devices  
In Compliance with the Requirements Defined by JEDEC  
Standard No. 7A  
16  
TSSOP−16  
DT SUFFIX  
CASE 948F  
HC  
138A  
ALYWG  
G
16  
Chip Complexity: 100 FETs or 29 Equivalent Gates  
Pb−Free Packages are Available*  
1
1
16  
1
SOEIAJ−16  
F SUFFIX  
CASE 966  
16  
74HC138A  
ALYWG  
1
A
L, WL  
Y, YY  
= Assembly Location  
= Wafer Lot  
= Year  
W, WW = Work Week  
G
= Pb−Free Package  
= Pb−Free Package  
G
(Note: Microdot may be in either location)  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 2 of this data sheet.  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
June, 2005 − Rev. 9  
MC74HC138A/D  

MC74HC138ADR2G 替代型号

型号 品牌 替代类型 描述 数据表
MC74HC138ADG ONSEMI

完全替代

1−of−8 Decoder/ Demultiplexer
CD74HC138M TI

功能相似

High Speed CMOS Logic 3-to-8 Line Decoder/ Demultiplexer Inverting and Non-Inverting

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