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MC74HC132

更新时间： 2024-09-24 23:05:43

品牌	Logo	应用领域
安森美 - ONSEMI		触发器栅
页数	文件大小	规格书
8页	151K
描述
Quad 2-Input NAND Gate with Schmitt-Trigger Inputs

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数据手册

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MC74HC132 数据手册

High–Performance Silicon–Gate CMOS

The MC74HC132A is identical in pinout to the LS132. The device

inputs are compatible with standard CMOS outputs; with pullup

resistors, they are compatible with LSTTL outputs.

The HC132A can be used to enhance noise immunity or to square up

slowly changing waveforms.

http://onsemi.com

MARKING

DIAGRAMS

• Output Drive Capability: 10 LSTTL Loads

• Outputs Directly Interface to CMOS, NMOS, and TTL

• Operating Voltage Range: 2.0 to 6.0 V

• Low Input Current: 1.0 µA

• High Noise Immunity Characteristic of CMOS Devices

PDIP–14

N SUFFIX

CASE 646

MC74HC132AN

AWLYYWW

SOIC–14

D SUFFIX

CASE 751A

HC132A

AWLYWW

• In Compliance with the Requirements Defined by JEDEC Standard

No. 7A

• Chip Complexity: 72 FETs or 18 Equivalent Gates

LOGIC DIAGRAM

= Assembly Location

WL or L = Wafer Lot

YY or Y = Year

WW or W = Work Week

PIN ASSIGNMENT

13 B4

11 Y4

10 B3

Y = AB

GND

ORDERING INFORMATION

Device

Package

PDIP–14

SOIC–14

Shipping

MC74HC132AN

MC74HC132AD

MC74HC132ADR2

2000 / Box

55 / Rail

PIN 14 = V

PIN 7 = GND

2500 / Reel

FUNCTION TABLE

Inputs

Output

Semiconductor Components Industries, LLC, 2000

Publication Order Number:

March, 2000 – Rev. 7

MC74HC132A/D

12 3 4 5 6 7 8

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MC74HC132AD	MOTOROLA	获取价格	Quad 2-Input NAND Gate with Schmitt-Trigger Inputs
MC74HC132ADD	MOTOROLA	获取价格	HC/UH SERIES, QUAD 2-INPUT NAND GATE, PDSO14, SOIC-14
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MC74HC132ADG	ONSEMI	获取价格	Quad 2−Input NAND Gate with Schmitt−Trigger Inputs High−Performance Sili
MC74HC132ADR2	ONSEMI	获取价格	Quad 2-Input NAND Gate with Schmitt-Trigger Inputs