MC74F3893A
QUAD FUTUREBUS
BACKPLANE TRANSCEIVER
(3 STATE + OPEN COLLECTOR)
QUAD FUTUREBUS
BACKPLANE TRANSCEIVER
(3 STATE + OPEN COLLECTOR)
The MC74F3893A is a quad backplane transceiver and is intended to be
used in very high speed bus systems.
The MC74F3893A interfaces to “Backplane Transceiver Logic” (BTL). BTL
features a reduced (1 V) voltage swing for lower power consumption and a se-
ries diode on the drivers to reduce capacitive loading (< 5 pF).
Incidentwave switching is employed, therefore BTL propagation delays are
short. Although the voltage swing is much less for BTL, so is its receiver
threshold region, therefore noise margins are excellent.
FAST SCHOTTKY TTL
BTL offers low power consumption, low ground bounce, reduced EMI and
crosstalk, low capacitive loading, superior noise margin and short propaga-
tion delays. This results in a high bandwidth, reliable backplane.
FN SUFFIX
PLASTIC
CASE 775-02
The MC74F3893A has four TTL outputs (R ) on the receiver side with a
n
commonReceiveEnableinput(RE).Ithasfourdatainputs(D )whicharealso
n
8
19
TTL. ThesedatainputsareNANDedwiththeDataEnableinput(DE). Thefour
I/O pins (Bus side) are futurebus compatible, sink a minimum of 100 mA, and
are designed to drive heavily loaded backplanes with load impedances as low
as 10 ohms. All outputs are designed to be glitch-free during power up and
power down.
4
3
ORDERING INFORMATION
MC74FXXXXAFN
Plastic
• Quad Backplane Transceiver
• Drives Heavily Loaded Backplanes with Equivalent Load Impedances
Down to 10 ohms
• Futurebus Drivers Sink 100 mA
LOGIC SYMBOL
• Reduced Voltage Swing (1 Volt) Produces Less Noise and Reduces
Power Consumption
2
4
7
9
• High Speed Operation Enhances Performance of Backplane Buses
and Facilitates Incident Wave Switching
D
D
D
D
3
0
1
2
11
12
DE
RE
• Compatible with IEEE 896 and IEEE 1194.1 Futurebus Standards
• Built-In Precision Band-Gap (BG) Reference Provides Accurate Re-
ceiver Threshold and Improved Noise Immunity
• Glitch-Free Power Up/Power Down Operation On All Outputs
• Pin and Function Compatible with NSC DS3893A and Signetics
74F3893
I/O
I/O
I/O
I/O
R
R
R
R
3
0
1
2
3
0
1
2
18 17 15
14
3
5
8
10
• Separate Bus Ground Returns for Each Driver to Minimize Ground
Noise
• MOS and TTL Compatible High Impedance Inputs
PINOUT: 20-LEAD PLCC (TOP VIEW)
BUS
GND
I/O
I/O
I/O
I/O
3
0
1
2
18
17
16
15
14
BUS
GND
BUS
GND
19
13
BG
GND
20
1
12
11
10
9
RE
DE
V
CC
D
2
R
D
0
0
3
R
3
3
4
5
6
7
8
D
R
LOGIC
GND
D
R
2
1
1
2
FAST AND LS TTL DATA
4-273