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MC74ACT564DWR2G PDF预览

MC74ACT564DWR2G

更新时间: 2024-02-10 05:59:28
品牌 Logo 应用领域
安森美 - ONSEMI 总线驱动器总线收发器触发器逻辑集成电路光电二极管
页数 文件大小 规格书
8页 82K
描述
Octal D−Type Flip−Flop with 3−State Outputs

MC74ACT564DWR2G 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP, SOP20,.4针数:20
Reach Compliance Code:compliantHTS代码:8542.39.00.01
Factory Lead Time:4 weeks风险等级:5.13
Is Samacsys:N其他特性:BROADSIDE VERSION OF 534
系列:ACTJESD-30 代码:R-PDSO-G20
JESD-609代码:e3长度:12.8 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.024 A湿度敏感等级:3
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP20,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:5 V
Prop。Delay @ Nom-Sup:11.5 ns传播延迟(tpd):11.5 ns
认证状态:Not Qualified座面最大高度:2.65 mm
子类别:FF/Latches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
触发器类型:POSITIVE EDGE宽度:7.5 mm
Base Number Matches:1

MC74ACT564DWR2G 数据手册

 浏览型号MC74ACT564DWR2G的Datasheet PDF文件第2页浏览型号MC74ACT564DWR2G的Datasheet PDF文件第3页浏览型号MC74ACT564DWR2G的Datasheet PDF文件第4页浏览型号MC74ACT564DWR2G的Datasheet PDF文件第5页浏览型号MC74ACT564DWR2G的Datasheet PDF文件第6页浏览型号MC74ACT564DWR2G的Datasheet PDF文件第7页 
MC74ACT564  
Octal D−Type Flip−Flop  
with 3−State Outputs  
The MC74ACT564 is a high−speed, low power octal flip−flop with  
a buffered common Clock (CP) and a buffered common Output  
Enable (OE).  
The information presented to the D inputs is stored in the flip−flops  
on the LOW−to−HIGH Clock (CP) transition.  
http://onsemi.com  
The MC74ACT564 device is functionally indentical to the  
MC74ACT574, but with inverted outputs.  
Features  
PDIP−20  
N SUFFIX  
CASE 738  
Inputs and Outputs on the Opposite Sides of the Package Allowing  
Easy Interface with Microprocessors  
1
Useful as Input or Output Port for Microprocessor  
Functionally Indentical to the MC74ACT574 but with Inverted  
Outputs  
3−State Outputs for Bus−Oriented Applications  
Outputs Source/Sink 24 mA  
SOIC−20W  
DW SUFFIX  
CASE 751D  
TTL Compatible Inputs  
Pb−Free Packages are Available*  
1
V
O
O
O
O
O
O
O
O
7
CP  
CC  
0
1
2
3
4
5
6
20  
19  
18  
17  
16  
15  
14  
12  
13  
11  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 5 of this data sheet.  
DEVICE MARKING INFORMATION  
See general marking information in the device marking  
section on page 5 of this data sheet.  
1
2
3
4
5
6
7
9
8
10  
OE  
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
GND  
Figure 1. Pinout: 20−Lead Packages Conductors  
(Top View)  
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
CP  
OE  
PIN ASSIGNMENT  
PIN  
FUNCTION  
O
O
O
O
O
O
O
O
6 7  
0
1
2
3
4
5
D −D  
Data Inputs  
0
7
CP  
Clock Pulse Input  
OE  
3−State Output Enable Input  
3−State Outputs  
Figure 2. Logic Symbol  
O −O  
0
7
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
December, 2006 − Rev. 3  
MC74ACT564/D  

MC74ACT564DWR2G 替代型号

型号 品牌 替代类型 描述 数据表
MC74ACT564DWR2 ONSEMI

完全替代

Octal D−Type Flip−Flop with 3−State Outputs

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