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MC74ACT240MELG PDF预览

MC74ACT240MELG

更新时间: 2024-11-14 05:22:19
品牌 Logo 应用领域
安森美 - ONSEMI 总线驱动器总线收发器逻辑集成电路光电二极管
页数 文件大小 规格书
10页 109K
描述
Octal Buffer/Line Driver with 3−State Outputs

MC74ACT240MELG 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP20,.3
针数:20Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.22
控制类型:ENABLE LOW系列:ACT
JESD-30 代码:R-PDSO-G20JESD-609代码:e4
长度:12.575 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.024 A
位数:4功能数量:2
端口数量:2端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP20,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:5 V
Prop。Delay @ Nom-Sup:9.5 ns传播延迟(tpd):9.5 ns
认证状态:Not Qualified座面最大高度:2.05 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:5.275 mmBase Number Matches:1

MC74ACT240MELG 数据手册

 浏览型号MC74ACT240MELG的Datasheet PDF文件第2页浏览型号MC74ACT240MELG的Datasheet PDF文件第3页浏览型号MC74ACT240MELG的Datasheet PDF文件第4页浏览型号MC74ACT240MELG的Datasheet PDF文件第5页浏览型号MC74ACT240MELG的Datasheet PDF文件第6页浏览型号MC74ACT240MELG的Datasheet PDF文件第7页 
MC74AC240, MC74ACT240  
Octal Buffer/Line Driver  
with 3−State Outputs  
The MC74AC240/74ACT240 is an octal buffer and line driver  
designed to be employed as a memory address driver, clock driver and  
bus oriented transmitter or receiver which provides improved PC  
board density.  
http://onsemi.com  
Features  
3−State Outputs Drive Bus Lines or Buffer Memory Address  
Registers  
Outputs Source/Sink 24 mA  
PDIP−20  
N SUFFIX  
CASE 738  
ACT240 Has TTL Compatible Inputs  
Pb−Free Packages are Available  
1
SOIC−20W  
DW SUFFIX  
CASE 751D  
TRUTH TABLE  
Inputs  
OE  
Outputs  
1
D
(Pins 12, 14, 16, 18)  
1
L
L
H
L
H
X
H
L
Z
TSSOP−20  
DT SUFFIX  
CASE 948E  
NOTE: H = HIGH Voltage Level  
L = LOW Voltage Level  
X = Immaterial  
1
Z = High Impedance  
SOEIAJ−20  
M SUFFIX  
CASE 967  
TRUTH TABLE  
Inputs  
OE  
Outputs  
1
D
(Pins 3, 5, 7, 9)  
2
L
L
H
L
H
X
H
L
Z
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 6 of this data sheet.  
NOTE: H = HIGH Voltage Level  
L = LOW Voltage Level  
X = Immaterial  
DEVICE MARKING INFORMATION  
See general marking information in the device marking  
section on page 7 of this data sheet.  
Z = High Impedance  
V
OE  
2
CC  
20  
19  
18  
17  
16  
15  
14  
12  
13  
11  
1
2
3
4
5
6
7
8
9
10  
OE  
GND  
1
Figure 1. Pinout: 20−Lead Packages Conductors  
(Top View)  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
November, 2006 − Rev. 8  
MC74AC240/D  

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