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MC54HC4053AJ PDF预览

MC54HC4053AJ

更新时间： 2024-10-15 00:01:07
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 解复用器开关复用器或开关信号电路光电二极管
页数 文件大小 规格书
16页 193K
描述
Analog Multiplexers/Demultiplexers

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MC54HC4053AJ 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：CERAMIC, DIP-16Reach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.92
Is Samacsys：N模拟集成电路 - 其他类型：SPDT
JESD-30 代码：R-GDIP-T16JESD-609代码：e0
长度：19.495 mm负电源电压最大值（Vsup）：-6 V
负电源电压最小值（Vsup）：信道数量：2
功能数量：3端子数量：16
标称断态隔离度：40 dB通态电阻匹配规范：30 Ω
最大通态电阻 (Ron)：190 Ω最高工作温度：125 °C
最低工作温度：-55 °C封装主体材料：CERAMIC, GLASS-SEALED
封装代码：DIP封装等效代码：DIP16,.3
封装形状：RECTANGULAR封装形式：IN-LINE
峰值回流温度（摄氏度）：NOT SPECIFIED电源：2/6,GND/-6 V
认证状态：Not Qualified座面最大高度：5.08 mm
最大信号电流：0.025 A子类别：Multiplexer or Switches
最大供电电流 (Isup)：0.08 mA最大供电电压 (Vsup)：6 V
最小供电电压 (Vsup)：2 V标称供电电压 (Vsup)：2 V
表面贴装：NO最长断开时间：370 ns
最长接通时间：370 ns切换：BREAK-BEFORE-MAKE
技术：CMOS温度等级：MILITARY
端子面层：Tin/Lead (Sn/Pb)端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：7.62 mm
Base Number Matches：1

MC54HC4053AJ 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
High–Performance Silicon–Gate CMOS  
The MC54/74HC4051A, MC74HC4052A and MC54/74HC4053A utilize  
silicon–gate CMOS technology to achieve fast propagation delays, low ON  
resistances, and low OFF leakage currents. These analog multiplexers/  
demultiplexers control analog voltages that may vary across the complete  
J SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
16  
16  
power supply range (from V  
to V ).  
CC  
EE  
1
The HC4051A, HC4052A and HC4053A are identical in pinout to the  
metal–gate MC14051AB, MC14052AB and MC14053AB. The Channel–Se-  
lect inputs determine which one of the Analog Inputs/Outputs is to be  
connected, by means of an analog switch, to the Common Output/Input.  
When the Enable pin is HIGH, all analog switches are turned off.  
The Channel–Select and Enable inputs are compatible with standard  
CMOS outputs; with pullup resistors they are compatible with LSTTL  
outputs.  
N SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
1
D SUFFIX  
SOIC PACKAGE  
CASE 751B–05  
16  
1
These devices have been designed so that the ON resistance (R ) is  
on  
of metal–gate CMOS analog  
DW SUFFIX  
SOIC WIDE PACKAGE  
CASE 751G–02  
more linear over input voltage than R  
switches.  
on  
16  
16  
1
1
For a multiplexer/demultiplexer with channel–select latches, see  
HC4351A.  
DT SUFFIX  
TSSOP PACKAGE  
CASE 948F–01  
•
•
•
•
•
•
Fast Switching and Propagation Speeds  
Low Crosstalk Between Switches  
Diode Protection on All Inputs/Outputs  
ORDERING INFORMATION  
Analog Power Supply Range (V  
– V ) = 2.0 to 12.0 V  
EE  
CC  
MC54HCXXXXAJ  
MC74HCXXXXAN  
MC74HCXXXXAD  
Ceramic  
Plastic  
SOIC  
Digital (Control) Power Supply Range (V  
– GND) = 2.0 to 6.0 V  
CC  
Improved Linearity and Lower ON Resistance Than Metal–Gate  
Counterparts  
Low Noise  
In Compliance With the Requirements of JEDEC Standard No. 7A  
Chip Complexity: HC4051A — 184 FETs or 46 Equivalent Gates  
HC4052A — 168 FETs or 42 Equivalent Gates  
HC4053A — 156 FETs or 39 Equivalent Gates  
MC74HCXXXXADW SOIC Wide  
MC74HCXXXXADT TSSOP  
•
•
•
FUNCTION TABLE – MC54/74HC4051A  
Control Inputs  
Select  
LOGIC DIAGRAM  
MC54/74HC4051A  
Single–Pole, 8–Position Plus Common Off  
Enable  
C
B
A
ON Channels  
L
L
L
L
L
L
L
L
H
L
L
L
L
L
H
H
L
L
H
L
H
L
H
L
H
X
X0  
X1  
X2  
X3  
X4  
X5  
X6  
X7  
NONE  
13  
L
X0  
H
H
H
H
X
14  
X1  
L
3
COMMON  
OUTPUT/  
INPUT  
15  
12  
1
X
X2  
X3  
X4  
X5  
X6  
X7  
A
H
H
X
ANALOG  
INPUTS/  
MULTIPLEXER/  
DEMULTIPLEXER  
OUTPUTS  
5
X = Don’t Care  
Pinout: MC54/74HC4051A (Top View)  
2
V
X2  
X1  
X0  
X3  
A
B
C
CC  
4
16  
15  
14  
13  
12  
11  
10  
9
11  
10  
9
CHANNEL  
SELECT  
INPUTS  
B
C
6
ENABLE  
PIN 16 = V  
PIN 7 = V  
PIN 8 = GND  
CC  
EE  
1
2
3
4
5
6
7
8
X4  
X6  
X
X7  
X5 Enable  
V
GND  
EE  
This document contains information on a new product. Specifications and information herein are subject to  
change without notice.  
10/97  
REV 0  
Motorola, Inc. 1997  
1234567...16

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