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MC54HC27J PDF预览

MC54HC27J

更新时间: 2024-11-14 00:01:07
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 栅极逻辑集成电路
页数 文件大小 规格书
6页 86K
描述
Triple 3-Input NOR Gate

MC54HC27J 技术参数

是否Rohs认证:不符合生命周期:Obsolete
包装说明:CERAMIC, DIP-14Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.77
Is Samacsys:N系列:HC/UH
JESD-30 代码:R-GDIP-T14JESD-609代码:e0
长度:19.495 mm负载电容(CL):50 pF
逻辑集成电路类型:NOR GATE功能数量:3
输入次数:3端子数量:14
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED传播延迟(tpd):27 ns
认证状态:Not Qualified座面最大高度:5.08 mm
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.62 mm
Base Number Matches:1

MC54HC27J 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
High–Performance Silicon–Gate CMOS  
The MC54/74HC27 is identical in pinout to the LS27. The device inputs  
are compatible with standard CMOS outputs; with pullup resistors, they are  
compatible with LSTTL outputs.  
J SUFFIX  
CERAMIC PACKAGE  
CASE 632–08  
14  
1
Output Drive Capability: 10 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 2 to 6 V  
N SUFFIX  
PLASTIC PACKAGE  
CASE 646–06  
Low Input Current: 1 µA  
14  
High Noise Immunity Characteristic of CMOS Devices  
In Compliance with the Requirements Defined by JEDEC Standard  
No. 7A  
1
D SUFFIX  
SOIC PACKAGE  
CASE 751A–03  
Chip Complexity: 42 FETs or 10.5 Equivalent Gates  
14  
1
LOGIC DIAGRAM  
ORDERING INFORMATION  
MC54HCXXJ  
MC74HCXXN  
MC74HCXXD  
Ceramic  
Plastic  
SOIC  
1
2
13  
A1  
B1  
C1  
12  
Y1  
PIN ASSIGNMENT  
3
4
5
A2  
B2  
C2  
A1  
B1  
1
2
14  
13  
V
CC  
6
8
Y2  
Y3  
Y = A + B + C  
C1  
A2  
B2  
3
4
12  
11  
Y1  
C3  
9
10  
11  
A3  
B3  
C3  
C2  
Y2  
5
6
10  
9
B3  
A3  
GND  
7
8
Y3  
PIN 14 = V  
CC  
PIN 7 = GND  
FUNCTION TABLE  
Inputs  
Output  
Y
A
B
C
L
X
X
H
L
X
H
X
L
H
X
X
H
L
L
L
10/95  
REV 6  
Motorola, Inc. 1995  

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