生命周期: | Transferred | 零件包装代码: | DIP |
包装说明: | DIP, DIP8,.3 | 针数: | 8 |
Reach Compliance Code: | unknown | ECCN代码: | EAR99 |
HTS代码: | 8542.39.00.01 | 风险等级: | 5.29 |
其他特性: | PROGRAMMABLE SLEW RATE | 差分输出: | NO |
驱动器位数: | 2 | 高电平输入电流最大值: | 0.00001 A |
输入特性: | STANDARD | 接口集成电路类型: | LINE DRIVER |
接口标准: | EIA-232-D; X.26; X.28; EIA-423; FED STD 1030 | JESD-30 代码: | R-PDIP-T8 |
JESD-609代码: | e0 | 长度: | 9.78 mm |
标称负供电电压: | -12 V | 功能数量: | 1 |
端子数量: | 8 | 最高工作温度: | 70 °C |
最低工作温度: | 最小输出摆幅: | 8 V | |
输出特性: | TOTEM-POLE | 输出极性: | INVERTED |
封装主体材料: | PLASTIC/EPOXY | 封装代码: | DIP |
封装等效代码: | DIP8,.3 | 封装形状: | RECTANGULAR |
封装形式: | IN-LINE | 电源: | +-12 V |
认证状态: | Not Qualified | 最大接收延迟: | |
座面最大高度: | 4.45 mm | 子类别: | Line Driver or Receivers |
最大供电电压: | 13.2 V | 最小供电电压: | 10.8 V |
标称供电电压: | 12 V | 表面贴装: | NO |
技术: | BIPOLAR | 温度等级: | COMMERCIAL |
端子面层: | Tin/Lead (Sn/Pb) | 端子形式: | THROUGH-HOLE |
端子节距: | 2.54 mm | 端子位置: | DUAL |
最大传输延迟: | 140000 ns | 宽度: | 7.62 mm |
Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
MC3488AP1D | MOTOROLA |
获取价格 |
Line Driver/Receiver, 2 Driver, PDIP8 | |
MC3488AP1G | ONSEMI |
获取价格 |
Dual EIA−423/EIA−232D Line Driver | |
MC3488AU | MOTOROLA |
获取价格 |
IC,LINE DRIVER,2 DRIVER,BIPOLAR/JFET,DIP,8PIN,CERAMIC | |
MC3488BP1 | MOTOROLA |
获取价格 |
Line Driver/Receiver, 2 Driver, PDIP8 | |
MC34901SEF | NXP |
获取价格 |
Transceiver, Physical Layer, Single CAN HS without wakeup,timeout, SOIC 8, Rail | |
MC34903CP3EK | NXP |
获取价格 |
System Basis Chip, 2x 3.3 V/400mA LDOs, 3 wakeup, SOIC 32, Rail | |
MC34903CP5EK | NXP |
获取价格 |
System Basis Chip, 2x 5.0 V/400mA LDOs, 3 wakeup, SOIC 32, Rail | |
MC34903CS3EK | NXP |
获取价格 |
System Basis Chip, LIN, 2x 3.3 V/400mA LDOs, 2/3 wakeup, SOIC 32, Rail | |
MC34903CS5EK | NXP |
获取价格 |
System Basis Chip, LIN, 2x 5.0 V/400mA LDOs, 2/3 wakeup, SOIC 32, Rail | |
MC34904C3EK | NXP |
获取价格 |
System Basis Chip, 2x 3.3 V/400mA LDOs, 4 wakeup, SOIC 32, Rail |