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MC33911G5ACR2

更新时间： 2024-09-24 08:29:51
品牌 Logo 应用领域
恩智浦 - NXP 驱动接口集成电路
页数 文件大小 规格书
105页 2184K
描述
0.11A BUF OR INV BASED PRPHL DRVR, PQFP32

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中文翻译

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MC33911G5ACR2 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Transferred零件包装代码：QFP
包装说明：7 X 7 MM, 1.40 MM HEIGHT, 0.80 MM PITCH, ROHS COMPLIANT, MS-026BBA, LQFP-32针数：32
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.83
Samacsys Description：LIN System Basis Chip with DC内置保护：OVER CURRENT; OVER VOLTAGE; THERMAL; UNDER VOLTAGE
接口集成电路类型：BUFFER OR INVERTER BASED PERIPHERAL DRIVERJESD-30 代码：S-PQFP-G32
JESD-609代码：e3长度：7 mm
湿度敏感等级：3功能数量：1
端子数量：32最高工作温度：125 °C
最低工作温度：-40 °C输出电流流向：SOURCE AND SINK
标称输出峰值电流：0.11 A封装主体材料：PLASTIC/EPOXY
封装代码：LQFP封装形状：SQUARE
封装形式：FLATPACK, LOW PROFILE峰值回流温度（摄氏度）：260
认证状态：Not Qualified座面最大高度：1.6 mm
最大供电电压：18 V最小供电电压：5.5 V
标称供电电压：13.5 V表面贴装：YES
温度等级：AUTOMOTIVE端子面层：Matte Tin (Sn)
端子形式：GULL WING端子节距：0.8 mm
端子位置：QUAD处于峰值回流温度下的最长时间：40
断开时间：10 µs接通时间：10 µs
宽度：7 mm

MC33911G5ACR2 数据手册

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Document Number: MC33911  
Rev. 10.0, 7/2016  
NXP Semiconductors  
Technical Data  
LIN system basis chip with DC motor  
pre-driver  
33911  
The 33911G5/BAC is a SMARTMOS Serial Peripheral Interface (SPI) controlled  
System Basis Chip (SBC), combining many frequently used functions in an MCU  
based system, plus a Local Interconnect Network (LIN) transceiver. The 33911  
has a 5.0 V, 50 mA/60 mA low dropout regulator with full protection and reporting  
features. The device provides full SPI readable diagnostics and a selectable  
timing watchdog for detecting errant operation. The LIN Protocol Specification  
2.0 and 2.1 compliant LIN transceiver has waveshaping circuitry which can be  
disabled for higher data rates.  
SYSTEM BASIS CHIP WITH LIN  
One 50 mA/60 mA high-side switch and two 150 mA/160 mA low-side switches  
with output protection are available. All outputs can be pulse-width modulated  
(PWM). Two high-voltage inputs are available for use in contact monitoring, or  
as external wake-up inputs. These inputs can be used as high-voltage Analog  
Inputs. The voltage on these pins is divided by a selectable ratio and available  
via an analog multiplexer.  
The 33911 has three main operating modes: Normal (all functions available),  
Sleep (VDD off, wake-up via LIN, wake-up inputs (L1, L2), cyclic sense, and  
forced wake-up), and Stop (VDD on with limited current capability, wake-up via  
CS, LIN bus, wake-up inputs, cyclic sense, forced wake-up, and external reset).  
AC SUFFIX (Pb-FREE)  
98ASH70029A  
32-PIN LQFP  
The 33911 is compatible with LIN Protocol Specification 2.0, 2.1, and  
SAEJ2602-2.  
Features  
Applications  
• Window lift  
• Mirror switch  
• Door lock  
• Sunroof  
• Full-duplex SPI interface at frequencies up to 4.0 MHz  
• LIN transceiver capable of up to 100 kbps with wave shaping  
• One 50 mA/60 mA high-side and two 150 mA/60 mA low-side protected  
switches  
• Two high-voltage analog/logic Inputs  
• Configurable window watchdog  
• Light control  
• 5.0 V low drop regulator with fault detection and low-voltage reset (LVR)  
circuitry  
33911  
V
BAT  
VSENSE  
VS1  
VS2  
HS1  
L1  
L2  
LIN INTERFACE  
LIN  
VDD  
PWMIN  
ADOUT0  
LS1  
LS2  
M
MCU  
MOSI  
MISO  
SCLK  
CS  
RXD  
TXD  
IRQ  
WDCONF  
RST  
Figure 1. 33911 simplified application diagram  
© 2016 NXP B.V.  
1234567...105

中文翻译

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 		0.11A BUF OR INV BASED PRPHL DRVR, PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, 0.80 MM PITCH, ROHS C

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