Datasheet > MC33661PEFR2

MC33661PEFR2

更新时间： 2024-11-20 12:27:51

品牌	Logo	应用领域
飞思卡尔 - FREESCALE		电信集成电路
页数	文件大小	规格书
22页	678K
描述
Local Interconnect Network (LIN) Enhanced Physical Interface with Selectable Slew-Rate

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MC33661PEFR2 数据手册

Document Number: MC33661

Rev. 8.0, 4/2013

Freescale Semiconductor

Technical Data

Local Interconnect Network

(LIN) Enhanced Physical

Interface with Selectable Slew-

Rate

33661

LIN PHYSICAL INTERFACE

Local interconnect network (LIN) is a serial communication protocol

designed to support automotive networks in conjunction with controller

area network (CAN). As the lowest level of a hierarchical network, LIN

enables cost-effective communication with sensors and actuators

when all the features of CAN are not required. This device is powered

by SMARTMOS technology.

The 33661 is a physical layer component dedicated to automotive

LIN sub-bus applications. It offers slew-rate selection for optimized

operation at 10 kbps and 20 kbps, fast baud rate (above 100 kbps) for

test and programming modes, excellent radiated emission

performance, and safe behavior in the event of LIN bus short-to-ground

or LIN bus leakage during low power mode.

EF SUFFIX (PB-FREE)

98ASB42564B

The 33661 is compatible with LIN Protocol Specification 2.0.

8-PIN SOICN

Features

• Operational from V_SUP6.0 V to 18 V DC, functional up to 27 V DC,

and handles 40 V during load dump

• Active bus waveshaping offering excellent radiated emission

performance

ORDERING INFORMATION

Device

(For Tape and

Reel, add an R2

Suffix)

Temperature

• 5.0 kV ESD on LIN bus pin

• 30 k internal pull-up resistor

• LIN bus short-to-ground or high leakage in Sleep mode

• -18 V to +40 V DC voltage at LIN pin

Package

Range (T )

MC33661PEF

-40 to 125°C

8 SOICN

• 8.0 A in Sleep mode

• Local and remote wake-up capability reported by INH and RXD pins

• 5.0 V and 3.3 V compatible digital inputs without any external 

components required

PWR

33661

WAKE

VSUP

INH

Regulator

12 V

MCU

LIN Bus

RXD

TXD

5.0 V

LIN

GND

Figure 1. 33661 Simplified Application Diagram

Freescale Semiconductor, Inc. reserves the right to change the detail specifications,

as may be required, to permit improvements in the design of its products.

12 3 4 5 6 7...22

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与MC33661PEFR2相关器件

型号	品牌	获取价格	描述	数据表
MC33661R2	MOTOROLA	获取价格	LIN Enhanced Physical Interface
MC33662BJEF	NXP	获取价格	Transceiver, Physical Layer, LIN 2.1 / SAEJ2602-2, 10kbps, SOIC 8, Rail
MC33662BLEF	NXP	获取价格	Transceiver, Physical Layer, LIN 2.1 / SAEJ2602-2, 20kbps,TX/RX symmetry, SOIC 8, Rail
MC33662BLEFR2	NXP	获取价格	Transceiver, Physical Layer, LIN 2.1 / SAEJ2602-2, 20kbps,TX/RX symmetry, SOIC 8, Reel
MC33662BSEF	NXP	获取价格	Transceiver, Physical Layer, LIN 2.1 / SAEJ2602-2, 20kbps, SOIC 8, Rail
MC33662JEF	NXP	获取价格	Transceiver, Physical Layer, LIN 2.1 / SAEJ2602-2, 10kbps, SOIC 8, Rail
MC33662LEF	NXP	获取价格	Transceiver, Physical Layer, LIN 2.1 / SAEJ2602-2, 20kbps,TX/RX symmetry, SOIC 8, Rail
MC33662SEF	NXP	获取价格	Transceiver, Physical Layer, LIN 2.1 / SAEJ2602-2, 20kbps, SOIC 8, Rail
MC33663	FREESCALE	获取价格	LIN 2.1 / SAEJ2602-2 Dual LIN Physical Layer
MC33663AJEF	FREESCALE	获取价格	LIN 2.1 / SAEJ2602-2 Dual LIN Physical Layer

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