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MC1489AML1 PDF预览

MC1489AML1

更新时间: 2024-11-26 20:41:59
品牌 Logo 应用领域
安森美 - ONSEMI 光电二极管接口集成电路
页数 文件大小 规格书
6页 122K
描述
QUAD LINE RECEIVER, PDSO14, EIAJ, SOIC-14

MC1489AML1 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SSOP, SOP14,.3
针数:14Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.37其他特性:RESPONSE CONTROL
输入特性:SCHMITT TRIGGER接口集成电路类型:LINE RECEIVER
接口标准:EIA-232-DJESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:6.2 mm
功能数量:4端子数量:14
最高工作温度:75 °C最低工作温度:
最大输出低电流:0.01 A封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SOP14,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
认证状态:Not Qualified最大接收延迟:50 ns
接收器位数:4座面最大高度:2 mm
子类别:Line Driver or Receivers最大压摆率:26 mA
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:YES
技术:BIPOLAR温度等级:COMMERCIAL EXTENDED
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:5.3 mm
Base Number Matches:1

MC1489AML1 数据手册

 浏览型号MC1489AML1的Datasheet PDF文件第2页浏览型号MC1489AML1的Datasheet PDF文件第3页浏览型号MC1489AML1的Datasheet PDF文件第4页浏览型号MC1489AML1的Datasheet PDF文件第5页浏览型号MC1489AML1的Datasheet PDF文件第6页 
Order this document by MC1489/D  
The MC1489 monolithic quad line receivers are designed to interface data  
terminal equipment with data communications equipment in conformance  
with the specifications of EIA Standard No. EIA–232D.  
QUAD MDTL  
LINE RECEIVERS  
EIA–232D  
Input Resistance – 3.0 k to 7.0 k  
Input Signal Range – ± 30 V  
Input Threshold Hysteresis Built In  
Response Control  
SEMICONDUCTOR  
TECHNICAL DATA  
a) Logic Threshold Shifting  
b) Input Noise Filtering  
P SUFFIX  
PLASTIC PACKAGE  
CASE 646  
ORDERING INFORMATION  
Operating  
D SUFFIX  
PLASTIC PACKAGE  
CASE 751A  
Temperature Range  
Device  
Package  
Plastic  
MC1489P, AP  
MC1489D, AD  
(SO–14)  
T
= 0 to + 75°C  
A
SO–14  
PIN CONNECTIONS  
1
2
3
4
5
6
7
14  
V
Input A  
CC  
Simplified Application  
Response  
Control A  
Input D  
13  
12  
Line Driver  
MC1488  
Interconnecting  
Cable  
Line Receiver  
MC1489  
Response  
Control D  
Output A  
Input B  
11 Output D  
Response  
Control B  
Input C  
10  
9
Response  
Control C  
Output B  
Ground  
Interconnecting  
Cable  
8
Output C  
MDTL Logic Output  
MDTL Logic Input  
Representative Schematic Diagram  
(1/4 of Circuit Shown)  
14  
V
CC  
9.0 k  
5.0 k  
1.7 k  
R
F
Response Control 2  
3 Output  
3.8 k  
Input 1  
10 k  
MC1489 MC1489A  
6.7 k1.6 kΩ  
R
F
7 GND  
Motorola, Inc. 1996  
Rev 5  

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