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MC1488P PDF预览

MC1488P

更新时间: 2024-11-22 22:54:59
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 线路驱动器或接收器驱动程序和接口接口集成电路光电二极管输入元件
页数 文件大小 规格书
8页 161K
描述
QUAD MDTL LINE DRIVER EIA-232D

MC1488P 技术参数

是否Rohs认证: 不符合生命周期:Transferred
包装说明:DIP, DIP14,.3Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.55Is Samacsys:N
其他特性:1 SINGLE INPUT DRIVER差分输出:NO
驱动器位数:4高电平输入电流最大值:0.00001 A
输入特性:GATED接口集成电路类型:LINE DRIVER
接口标准:EIA-232-DJESD-30 代码:R-PDIP-T14
JESD-609代码:e0长度:18.86 mm
标称负供电电压:-9 V功能数量:4
端子数量:14最高工作温度:75 °C
最低工作温度:最小输出摆幅:12 V
输出特性:TOTEM-POLE输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP14,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:+-9 V认证状态:Not Qualified
最大接收延迟:座面最大高度:4.69 mm
子类别:Line Driver or Receivers最大供电电压:9.09 V
最小供电电压:8.91 V标称供电电压:9 V
表面贴装:NO技术:BIPOLAR
温度等级:COMMERCIAL EXTENDED端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
最大传输延迟:175 ns宽度:7.62 mm
Base Number Matches:1

MC1488P 数据手册

 浏览型号MC1488P的Datasheet PDF文件第2页浏览型号MC1488P的Datasheet PDF文件第3页浏览型号MC1488P的Datasheet PDF文件第4页浏览型号MC1488P的Datasheet PDF文件第5页浏览型号MC1488P的Datasheet PDF文件第6页浏览型号MC1488P的Datasheet PDF文件第7页 
Order this document by MC1488/D  
The MC1488 is a monolithic quad line driver designed to interface data  
terminal equipment with data communications equipment in conformance  
with the specifications of EIA Standard No. EIA–232D.  
QUAD MDTL LINE DRIVER  
EIA–232D  
Features:  
Current Limited Output  
±10 mA typical  
SEMICONDUCTOR  
TECHNICAL DATA  
Power–Off Source Impedance  
300 mininum  
Simple Slew Rate Control with External Capacitor  
Flexible Operating Supply Range  
Compatible with All Motorola MDTL and MTTL Logic Families  
P SUFFIX  
PLASTIC PACKAGE  
CASE 646  
ORDERING INFORMATION  
Operating  
D SUFFIX  
PLASTIC PACKAGE  
CASE 751A  
Temperature Range  
Device  
Package  
Plastic  
MC1488P  
MC1488D  
(SO–14)  
T
A
= 0 to + 75°C  
SO–14  
PIN CONNECTIONS  
1
2
3
4
5
6
7
14  
13  
12  
V
V
CC  
EE  
Simplified Application  
Input D1  
Input D2  
Output D  
Input C1  
Input C2  
Output C  
Input A  
Output A  
Input B1  
Input B2  
Output B  
Gnd  
Line Driver  
MC1488  
Interconnecting  
Cable  
Line Receiver  
MC1489  
11  
10  
9
Interconnecting  
Cable  
MDTL Logic Output  
MDTL Logic Input  
8
Circuit Schematic  
(1/4 of Circuit Shown)  
V
14  
CC  
6.2 k  
8.2 k  
Pins 4, 9, 12 or 2  
Input  
Input  
70  
Pins 5, 10, 13  
300  
Output  
Pins 6, 8, 11 or 3  
3.6 k  
GND 7  
10 k  
7.0 k  
70  
V
1
EE  
Motorola, Inc. 1996  
Rev 3  

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