MC14584B
Hex Schmitt Trigger
The MC14584B Hex Schmitt Trigger is constructed with MOS
P−channel and N−channel enhancement mode devices in a single
monolithic structure. These devices find primary use where low power
dissipation and/or high noise immunity is desired. The MC14584B
may be used in place of the MC14069UB hex inverter for enhanced
noise immunity to “square up” slowly changing waveforms.
http://onsemi.com
MARKING
Features
DIAGRAMS
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low−power TTL Loads or One Low−power
Schottky TTL Load over the Rated Temperature Range
• Double Diode Protection on All Inputs
14
PDIP−14
P SUFFIX
CASE 646
MC14584BCP
AWLYYWWG
1
• Can Be Used to Replace MC14069UB
• For Greater Hysteresis, Use MC14106B which is Pin−for−Pin
Replacement for CD40106B and MM74Cl4
• Pb−Free Packages are Available
14
SOIC−14
D SUFFIX
CASE 751A
14584BG
AWLYWW
1
MAXIMUM RATINGS (Voltages Referenced to V
)
SS
14
1
Symbol
Parameter
Value
−0.5 to +18.0
Unit
V
14
584B
ALYWG
G
TSSOP−14
DT SUFFIX
CASE 948G
V
DC Supply Voltage Range
DD
V , V
in out
Input or Output Voltage Range
(DC or Transient)
−0.5 to V + 0.5
V
DD
I , I
in out
Input or Output Current
(DC or Transient) per Pin
±10
mA
14
P
Power Dissipation, per Package
(Note 1)
500
mW
D
SOEIAJ−14
F SUFFIX
CASE 965
MC14584B
ALYWG
T
A
Ambient Temperature Range
Storage Temperature Range
−55 to +125
−65 to +150
260
°C
°C
°C
1
T
stg
T
Lead Temperature
(8−Second Soldering)
L
A
WL, L
YY, Y
= Assembly Location
= Wafer Lot
= Year
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating:
WW, W = Work Week
G or G
= Pb−Free Package
(Note: Microdot may be in either location)
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
high−impedance circuit. For proper operation, V and V should be constrained
in
out
to the range V v (V or V ) v V
.
SS
in
out
DD
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either V or V ). Unused outputs must be left open.
SS
DD
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
October, 2006 − Rev. 7
MC14584B/D