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MC14557BFELG

更新时间： 2024-02-19 08:47:16
品牌 Logo 应用领域
安森美 - ONSEMI 移位寄存器
页数 文件大小 规格书
8页 172K
描述
IC 4000/14000/40000 SERIES, 64-BIT RIGHT SERIAL IN SERIAL OUT SHIFT REGISTER, COMPLEMENTARY OUTPUT, PDSO16, ROHS COMPLIANT, EIAJ, SOIC-16, Shift Register

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MC14557BFELG 技术参数

是否Rohs认证：符合生命周期：Obsolete
零件包装代码：SOIC包装说明：EIAJ, LEAD FREE, SOIC-16
针数：16Reach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.66
Is Samacsys：N计数方向：RIGHT
系列：4000/14000/40000JESD-30 代码：R-PDSO-G16
JESD-609代码：e4长度：10.2 mm
逻辑集成电路类型：SERIAL IN SERIAL OUT最大频率@ Nom-Sup：1700000 Hz
湿度敏感等级：3位数：64
功能数量：1端子数量：16
最高工作温度：125 °C最低工作温度：-55 °C
输出极性：COMPLEMENTARY封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP16,.3
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：260电源：5/15 V
传播延迟（tpd）：600 ns认证状态：Not Qualified
座面最大高度：2.05 mm子类别：Shift Registers
最大供电电压 (Vsup)：18 V最小供电电压 (Vsup)：3 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：40触发器类型：POSITIVE EDGE
宽度：5.275 mm最小 fmax：6.7 MHz
Base Number Matches：1

MC14557BFELG 数据手册

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The MC14557B is a static clocked serial shift register whose length  
may be programmed to be any number of bits between 1 and 64. The  
number of bits selected is equal to the sum of the subscripts of the  
enabled Length Control inputs (L1, L2, L4, L8, L16, and L32) plus  
one. Serial data may be selected from the A or B data inputs with the  
A/B select input. This feature is useful for recirculation purposes. A  
Clock Enable (CE) input is provided to allow gating of the clock or  
negative edge clocking capability.  
http://onsemi.com  
MARKING  
DIAGRAMS  
16  
The device can be effectively used for variable digital delay lines or  
simply to implement odd length shift registers.  
PDIP–16  
P SUFFIX  
CASE 648  
MC14557BCP  
AWLYYWW  
• 1–64 Bit Programmable Length  
• Q and Q Serial Buffered Outputs  
• Asynchronous Master Reset  
1
16  
• All Inputs Buffered  
14557B  
• No Limit On Clock Rise and Fall Times  
• Supply Voltage Range = 3.0 Vdc to 18 Vdc  
SOIC–16  
DW SUFFIX  
CASE 751G  
• Capable of Driving Two Low–power TTL Loads or one Low–power  
AWLYYWW  
Schottky TTL Load Over the Rated Temperature Range  
1
16  
SOEIAJ–16  
F SUFFIX  
CASE 966  
MAXIMUM RATINGS (Voltages Referenced to V ) (Note 2.)  
SS  
MC14557B  
AWLYWW  
Symbol  
Parameter  
Value  
Unit  
V
V
DD  
DC Supply Voltage Range  
–0.5 to +18.0  
1
V , V  
Input or Output Voltage Range  
(DC or Transient)  
–0.5 to V + 0.5  
V
in out  
DD  
A
= Assembly Location  
WL or L = Wafer Lot  
YY or Y = Year  
WW or W = Work Week  
I , I  
in out  
Input or Output Current  
(DC or Transient) per Pin  
±10  
mA  
P
D
Power Dissipation,  
500  
mW  
per Package (Note 3.)  
ORDERING INFORMATION  
T
Ambient Temperature Range  
Storage Temperature Range  
–55 to +125  
–65 to +150  
260  
°C  
°C  
°C  
A
Device  
Package  
PDIP–16  
SOIC–16  
Shipping  
T
stg  
MC14557BCP  
MC14557BDW  
2000/Box  
47/Rail  
T
Lead Temperature  
L
(8–Second Soldering)  
2. Maximum Ratings are those values beyond which damage to the device  
may occur.  
3. Temperature Derating:  
MC14557BDWR2  
MC14557BF  
SOIC–16 1000/Tape & Reel  
SOEIAJ–16  
SOEIAJ–16  
See Note 1.  
See Note 1.  
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C  
MC14557BFEL  
This device contains protection circuitry to guard against damage due to high  
static voltages or electric fields. However, precautions must be taken to avoid  
applications of any voltage higher than maximum rated voltages to this  
1. For ordering information on the EIAJ version of  
the SOIC packages, please contact your local  
ON Semiconductor representative.  
high–impedancecircuit. For proper operation, V and V should be constrained  
in  
out  
to the range V  
(V or V  
)
V
DD  
.
SS  
in  
out  
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,  
either V or V ). Unused outputs must be left open.  
SS  
DD  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
March, 2000 – Rev. 3  
MC14557B/D  
12345678

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