MC14551B
Quad 2-Channel Analog
Multiplexer/Demultiplexer
The MC14551B is a digitally–controlled analog switch. This device
implements a 4PDT solid state switch with low ON impedance and
very low OFF Leakage current. Control of analog signals up to the
complete supply voltage range can be achieved.
http://onsemi.com
• Triple Diode Protection on All Control Inputs
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Analog Voltage Range (V – V ) = 3.0 to 18 V
MARKING
DIAGRAMS
DD
EE
16
Note: V must be v V
EE
SS
PDIP–16
P SUFFIX
CASE 648
MC14551BCP
AWLYYWW
• Linearized Transfer Characteristics
• Low Noise — 12 nV√Cycle, f ≥ 1.0 kHz typical
1
• For Low R , Use The HC4051, HC4052, or HC4053 High–Speed
ON
CMOS Devices
16
• Switch Function is Break Before Make
SOIC–16
D SUFFIX
CASE 751B
14551B
AWLYWW
1
MAXIMUM RATINGS (2.)
16
SOEIAJ–16
F SUFFIX
CASE 966
Symbol
Parameter
Value
Unit
MC14551B
ALYW
V
DD
DC Supply Voltage Range
– 0.5 to + 18.0
V
(Referenced to V , V ≥ V )
EE
EE
SS
1
V , V
in out
Input or Output Voltage (DC or
Transient) (Referenced to V for
– 0.5 to V + 0.5
V
DD
SS
A
WL, L
YY, Y
= Assembly Location
= Wafer Lot
= Year
Control Input & V for Switch I/O)
EE
I
in
Input Current (DC or Transient),
per Control Pin
± 10
mA
WW, W = Work Week
I
Switch Through Current
± 25
500
mA
mW
_C
sw
(3.)
P
T
Power Dissipation, per Package
Ambient Temperature Range
Storage Temperature Range
ORDERING INFORMATION
D
– 55 to + 125
– 65 to + 150
260
Device
Package
PDIP–16
Shipping
A
T
_C
stg
MC14551BCP
MC14551BD
MC14551BDR2
MC14551BF
2000/Box
48/Rail
T
Lead Temperature
(8–Second Soldering)
_C
L
SOIC–16
SOIC–16
SOEIAJ–16
2500/Tape & Reel
See Note 1.
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high–impedance circuit. For proper operation, V and V should be constrained
in
out
to the range V v (V or V ) v V for control inputs and V ≤ (V or V ) ≤
SS
in
out
DD
EE
in
out
V
DD
for Switch I/O.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either V , V or V ). Unused outputs must be left open.
SS
EE
DD
Semiconductor Components Industries, LLC, 2000
1
Publication Order Number:
August, 2000 – Rev. 4
MC14551B/D