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SEMICONDUCTOR TECHNICAL DATA
Product Preview
DW SUFFIX
SOG PACKAGE
CASE 751D
20
1
The MC145483 is a 13–bit linear PCM Codec–Filter with 2s complement data
format, and is offered in 20–pin SOG and SSOP packages. This device
performs the voice digitization and reconstruction as well as the band limiting
and smoothing required for the voice coding in digital communication systems.
This device is designed to operate in both synchronous and asynchronous
applications and contains an on–chip precision reference voltage.
SD SUFFIX
SSOP
CASE 940C
20
1
This device has an input operational amplifier whose output is the input to the
encoder section. The encoder section immediately low–pass filters the analog
signal with an active R–C filter to eliminate very high frequency noise from being
modulated down to the passband by the switched capacitor filter. From the
active R–C filter, the analog signal is converted to a differential signal. From this
point, all analog signal processing is done differentially. This allows processing
of an analog signal that is twice the amplitude allowed by a single–ended
design, which reduces the significance of noise to both the inverted and
non–inverted signal paths. Another advantage of this differential design is that
noise injected via the power supplies is a common–mode signal that is
cancelled when the inverted and non–inverted signals are recombined. This
dramatically improves the power supply rejection ratio.
After the differential converter, a differential switched capacitor filter band–
passes the analog signal from 200 Hz to 3400 Hz before the signal is digitized
by the differential 13–bit linear A/D converter. The digital output is 2s
complement format.
The decoder digital input accepts 2s complement data and reconstructs it
using a differential 13–bit linear D/A converter. The output of the D/A is
low–pass filtered at 3400 Hz and sinX/X compensated by a differential switched
capacitor filter. The signal is then filtered by an active R–C filter to eliminate the
out–of–band energy of the switched capacitor filter.
ORDERING INFORMATION
MC145483DW
MC145483SD
SOG Package
SSOP
PIN ASSIGNMENT
V
Ref
1
20
19
V
AG
AG
TI+
RO–
2
PI
3
4
18
17
TI–
TG
PO–
PO+
5
6
16
15
HB
V
V
SS
DD
FSR
DR
7
14
13
12
11
FST
8
DT
BCLKR
PDI
9
BCLKT
MCLK
10
The MC145483 PCM Codec–Filter has a high impedance V
reference pin
AG
which allows for decoupling of the internal circuitry that generates the
mid–supply V reference voltage to the V power supply ground. This
AG
SS
reduces clock noise on the analog circuitry when external analog signals are
referenced to the power supply ground.
The MC145483 13–bit linear PCM Codec–Filter accepts both Short Frame
Sync and Long Frame Sync clock formats, and utilizes CMOS due to its reliable
low–power performance and proven capability for complex analog/digital VLSI
functions.
•
•
•
•
•
•
•
•
Single 3 V Power Supply
13–Bit Linear ADC/DAC Conversions with 2s Complement Data Format
Typical Power Dissipation of 8 mW, Power–Down of 0.01 mW
Fully–Differential Analog Circuit Design for Lowest Noise
Transmit Band–Pass and Receive Low–Pass Filters On–Chip
Transmit High–Pass Filter May be Bypassed by Pin Selection
Active R–C Pre–Filtering and Post–Filtering
On–Chip Precision Reference Voltage of 0.886 V for a – 5 dBm TLP
@ 600 Ω
•
•
3–Terminal Input Op Amp Can be Used, or a 2–Channel Input Multiplexer
Receive Gain Control from 0 dB to – 21 dB in 3 dB Steps in Synchronous
Operation
•
Push–Pull 300 Ω Power Drivers with External Gain Adjust
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.
REV 2
3/97 TN97033100
Motorola, Inc. 1997
MOTOROLA
MC145483
1
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