Datasheet > MC145483DW

MC145483DW

更新时间： 2024-11-27 20:35:39

品牌	Logo	应用领域
恩智浦 - NXP		PC 电信光电二极管电信集成电路
页数	文件大小	规格书
24页	409K
描述
IC,PCM CODEC,SINGLE,CMOS,SOP,20PIN,PLASTIC

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MC145483DW 技术参数

是否Rohs认证：	符合	生命周期：	Transferred
零件包装代码：	SOIC	包装说明：	SOP, SOP20,.4
针数：	20	Reach Compliance Code：	unknown
ECCN代码：	EAR99	HTS代码：	8542.31.00.01
风险等级：	5.04	Is Samacsys：	N
压伸定律：	MU-LAW	滤波器：	YES
最大增益公差：	0.25 dB	JESD-30 代码：	R-PDSO-G20
长度：	12.8 mm	线性编码：	13-BIT
功能数量：	1	端子数量：	20
工作模式：	SYNCHRONOUS/ASYNCHRONOUS	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP	封装等效代码：	SOP20,.4
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE
峰值回流温度（摄氏度）：	NOT SPECIFIED	电源：	3/3.3 V
认证状态：	Not Qualified	座面最大高度：	2.65 mm
子类别：	Codecs	标称供电电压：	3 V
表面贴装：	YES	技术：	CMOS
电信集成电路类型：	PCM CODEC	温度等级：	INDUSTRIAL
端子形式：	GULL WING	端子节距：	1.27 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	7.5 mm	Base Number Matches：	1

MC145483DW 数据手册

Freescale Semiconductor, Inc.

SEMICONDUCTOR TECHNICAL DATA

Order this document

by MC145483/D

The MC145483 is a 13–bit linear PCM Codec–Filter with 2s complement data

format, and is offered in 20–pin SOG, SSOP, and TSSOP packages, and a

32–pin QFN package. This device performs the voice digitization and

reconstruction as well as the band limiting and smoothing required for the voice

coding in digital communication systems. This device is designed to operate in

both synchronous and asynchronous applications and contains an on–chip

precision reference voltage.

This device has an input operational amplifier whose output is the input to the

encoder section. The encoder section immediately low–pass filters the analog

signal with an active R–C filter to eliminate very high frequency noise from being

modulated down to the passband by the switched capacitor filter. From the

active R–C filter, the analog signal is converted to a differential signal. From this

point, all analog signal processing is done differentially. This allows processing

of an analog signal that is twice the amplitude allowed by a single–ended

design, which reduces the significance of noise to both the inverted and

non–inverted signal paths. Another advantage of this differential design is that

noise injected via the power supplies is a common–mode signal that is

cancelled when the inverted and non–inverted signals are recombined. This

dramatically improves the power supply rejection ratio.

DW SUFFIX

SOG PACKAGE

CASE 751D

SD SUFFIX

SSOP

CASE 940C

DT SUFFIX

TSSOP

CASE 948E

After the differential converter, a differential switched capacitor filter band–

passes the analog signal from 200 Hz to 3400 Hz before the signal is digitized

by the differential 13–bit linear A/D converter. The digital output is 2s

complement format.

FC SUFFIX

QFN

CASE 1311

The decoder digital input accepts 2s complement data and reconstructs it

using a differential 13–bit linear D/A converter. The output of the D/A is

low–pass filtered at 3400 Hz and sinX/X compensated by a differential switched

capacitor filter. The signal is then filtered by an active R–C filter to eliminate the

out–of–band energy of the switched capacitor filter.

ORDERING INFORMATION

MC145483DW

SOG Package

SSOP

The MC145483 PCM Codec–Filter has a high–impedance V

reference pin

MC145483SD

MC145483DT

MC145483FC

which allows for decoupling of the internal circuitry that generates the

mid–supply V reference voltage to the V power supply ground. This

TSSOP

QFN

reduces clock noise on the analog circuitry when external analog signals are

referenced to the power supply ground.

The MC145483 13–bit linear PCM Codec–Filter accepts both Short Frame

Sync and Long Frame Sync clock formats, and utilizes CMOS due to its reliable

low–power performance and proven capability for complex analog/digital VLSI

functions.

• Single 3 V Power Supply

• 13–Bit Linear ADC/DAC Conversions with 2s Complement Data Format

• Typical Power Dissipation of 8 mW, Power–Down of 0.01 mW

• Fully–Differential Analog Circuit Design for Lowest Noise

• Transmit Band–Pass and Receive Low–Pass Filters On–Chip

• Transmit High–Pass Filter May be Bypassed by Pin Selection

• Active R–C Pre–Filtering and Post–Filtering

• On–Chip Precision Reference Voltage of 0.886 V for a – 5 dBm TLP

@ 600 Ω

• 3–Terminal Input Op Amp Can be Used, or a 2–Channel Input Multiplexer

• Receive Gain Control from 0 dB to – 21 dB in 3 dB Steps in Synchronous

Operation

• Push–Pull 300–Ω Power Drivers with External Gain Adjust

REV 3

4/2003

 Motorola, Inc. 2003

MOTOROLA

MC145483

For More Information On This Product,

Go to: www.freescale.com

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MC145483DW 替代型号

型号	品牌	替代类型	描述	数据表
MC145483DWR2	MOTOROLA	功能相似	PCM Codec, MU-Law, 1-Func, CMOS, PDSO20, SOG-20

与MC145483DW相关器件

型号	品牌	获取价格	描述	数据表
MC145483DWR2	MOTOROLA	获取价格	PCM Codec, MU-Law, 1-Func, CMOS, PDSO20, SOG-20
MC145483DWR2	NXP	获取价格	MU-LAW, PCM CODEC, PDSO20, SOG-20
MC145483EGR2	MOTOROLA	获取价格	MU-LAW, PCM CODEC, PDSO20, SOG-20
MC145483EJ	NXP	获取价格	MU-LAW, PCM CODEC, PDSO20, TSSOP-20
MC145483EJ	ROCHESTER	获取价格	MU-LAW, PCM CODEC, PDSO20, TSSOP-20
MC145483EJR2	NXP	获取价格	MU-LAW, PCM CODEC, PDSO20, TSSOP-20
MC145483EJR2	ROCHESTER	获取价格	MU-LAW, PCM CODEC, PDSO20, TSSOP-20
MC145483EN	ROCHESTER	获取价格	MU-LAW, PCM CODEC, PDSO20, SSOP-20
MC145483ENR2	FREESCALE	获取价格	3 V 13-BIT LINEAR PCM CODEC-FILTER
MC145483FCR2	ROCHESTER	获取价格	MU-LAW, PCM CODEC, QCC32, QFN-32

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