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MC14529BCLD PDF预览

MC14529BCLD

更新时间: 2024-11-04 13:11:15
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 驱动器
页数 文件大小 规格书
8页 253K
描述
Single-Ended Multiplexer, 2 Func, 4 Channel, CMOS, CDIP16, 620-09

MC14529BCLD 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DIP, DIP16,.3Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.91
模拟集成电路 - 其他类型:SINGLE-ENDED MULTIPLEXERJESD-30 代码:R-GDIP-T16
JESD-609代码:e0长度:19.3 mm
信道数量:4功能数量:2
端子数量:16通态电阻匹配规范:15 Ω
最大通态电阻 (Ron):480 Ω最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DIP封装等效代码:DIP16,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5/15 V
认证状态:Not Qualified座面最大高度:4.19 mm
子类别:Multiplexer or Switches最大供电电压 (Vsup):18 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):5 V
表面贴装:NO最长断开时间:400 ns
最长接通时间:400 ns技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mmBase Number Matches:1

MC14529BCLD 数据手册

 浏览型号MC14529BCLD的Datasheet PDF文件第2页浏览型号MC14529BCLD的Datasheet PDF文件第3页浏览型号MC14529BCLD的Datasheet PDF文件第4页浏览型号MC14529BCLD的Datasheet PDF文件第5页浏览型号MC14529BCLD的Datasheet PDF文件第6页浏览型号MC14529BCLD的Datasheet PDF文件第7页 
SEMICONDUCTOR TECHNICAL DATA  
L SUFFIX  
CERAMIC  
CASE 620  
The MC14529B analog data selector is a dual 4–channel or single  
8–channel device depending on the input coding. The device is suitable for  
digital as well as analog application, including various one–of–four and  
one–of–eight data selector functions. Since the device has bidirectional  
analog characteristics it can also be used as a dual binary to 1–of–4 or a  
binary to 1–of–8 decoder.  
P SUFFIX  
PLASTIC  
CASE 648  
Data Paths Are Bidirectional  
3–State Outputs  
Linear “On” Resistance  
Supply Voltage Range = 3.0 Vdc to 18 Vdc  
Capable of Driving Two Low–power TTL Loads or One Low–power  
Schottky TTL Load over the Rated Temperature Range.  
D SUFFIX  
SOIC  
CASE 751B  
MAXIMUM RATINGS* (Voltages Referenced to V  
)
SS  
ORDERING INFORMATION  
Symbol  
Parameter  
DC Supply Voltage  
Value  
Unit  
V
MC14XXXBCP  
MC14XXXBCL  
MC14XXXBD  
Plastic  
Ceramic  
SOIC  
V
DD  
– 0.5 to + 18.0  
V , V  
Input or Output Voltage (DC or Transient)  
– 0.5 to V  
DD  
+ 0.5  
V
in out  
I , I  
T
A
= – 55° to 125°C for all packages.  
Input or Output Current (DC or Transient),  
per Pin  
± 10  
mA  
in out  
P
Power Dissipation, per Package†  
Storage Temperature  
500  
mW  
C
D
BLOCK DIAGRAM  
T
stg  
– 65 to + 150  
260  
T
Lead Temperature (8–Second Soldering)  
C
3–STATE OUTPUT ENABLE  
STROBE X 1  
L
* Maximum Ratings are those values beyond which damage to the device may occur.  
Temperature Derating:  
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C  
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C  
6
A
7
2
3
B
TRUTH TABLE (X = Don’t Care)  
X0  
X1  
9
Z
ST  
ST  
B
A
Z
W
X
Y
4
5
X2  
X3  
1
1
1
1
1
1
1
1
0
0
1
1
0
1
0
1
X0  
X1  
X2  
X3  
Y0  
Y1  
Y2  
Y3  
Dual 4–Channel Mode  
2 Outputs  
1
1
1
1
0
0
0
0
0
0
1
1
0
1
0
1
X0  
X1  
X2  
X3  
14  
13  
12  
11  
Y0  
Y1  
10  
W
Single 8–Channel Mode  
1 Output  
(Z and W tied together)  
Y2  
Y3  
0
0
0
0
1
1
1
1
0
0
1
1
0
1
0
1
Y0  
Y1  
Y2  
Y3  
STROBE Y 15  
V
V
= PIN 16  
= PIN 8  
DD  
SS  
0
0
X
X
High  
Impedance  
This device contains protection circuitry to guard against damage  
due to high static voltages or electric fields. However, precautions must  
be taken to avoid applications of any voltage higher than maximum rated  
voltages to this high-impedance circuit. For proper operation, V and  
in  
V
out  
should be constrained to the range V  
SS  
(V or V ) V .  
in out DD  
Unused inputs must always be tied to an appropriate logic voltage  
level (e.g., either V or V ). Unused outputs must be left open.  
SS DD  
REV 3  
1/94  
Motorola, Inc. 1995  

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