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MC145202F1

更新时间： 2024-02-27 21:40:19
品牌 Logo 应用领域
恩智浦 - NXP 光电二极管
页数 文件大小 规格书
24页 465K
描述
PLL FREQUENCY SYNTHESIZER, 2000MHz, PDSO20, SOP-20

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中文翻译

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MC145202F1 技术参数

生命周期：Transferred零件包装代码：SOIC
包装说明：SOP,针数：20
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.65其他特性：DUAL MODULUS PRESCALER: 64/65
模拟集成电路 - 其他类型：PLL FREQUENCY SYNTHESIZERJESD-30 代码：R-PDSO-G20
长度：12.675 mm功能数量：1
端子数量：20最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE认证状态：Not Qualified
座面最大高度：2 mm最大供电电压 (Vsup)：3 V
最小供电电压 (Vsup)：2.7 V标称供电电压 (Vsup)：5.5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
宽度：5.258 mmBase Number Matches：1

MC145202F1 数据手册

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Freescale Semiconductor, InOcrd.er this document by MC145202–1/D  
ARCHIVED BY FREESCALE SEMICONDUCTOR, INC. 2005  
The MC145202–1 is recommended for new designs and has improved  
suppression of reference sideband spurs. The counters are programmed via  
a synchronous serial port which is SPI compatible. The serial port is  
byte-oriented to facilitate control via an MCU. Due to the innovative  
BitGrabber Plus registers, the MC145202–1 may be cascaded with other  
peripherals featuring BitGrabber Plus without requiring leading dummy bits  
or address bits in the serial data stream. In addition, BitGrabber Plus  
peripherals may be cascaded with existing BitGrabber peripherals.  
The device features a single–ended current source/sink phase detector A  
output and a double–ended phase detector B output. Both phase detectors  
have linear transfer functions (no dead zones). The maximum current of the  
single–ended phase detector output is determined by an external resistor  
tied from the Rx pin to ground. This current can be varied via the serial port.  
PLL FREQUENCY  
SYNTHESIZER  
SEMICONDUCTOR  
TECHNICAL DATA  
Slew–rate control is provided by a special driver designed for the REF  
out  
pin. This minimizes interference caused by REF  
.
20  
out  
This part includes a differential RF input that may be operated in a  
single–ended mode. Also featured are on–board support of an external  
crystal and a programmable reference output. The R, A, and N counters are  
fully programmable. The C register (configuration register) allows the part to  
be configured to meet various applications. A patented feature allows the C  
register to shut off unused outputs, thereby minimizing system noise and  
interference.  
In order to have consistent lock times and prevent erroneous data from  
being loaded into the counters, on–board circuitry synchronizes the update  
of the A register if the A or N counters are loading. Similarly, an update of the  
R register is synchronized if the R counter is loading.  
1
F SUFFIX  
PLASTIC PACKAGE  
CASE 751J  
(SO–20)  
The double–buffered R register allows new divide ratios to be presented  
to the three counters (R, A, and N) simultaneously.  
PIN CONNECTIONS  
• Maximum Operating Frequency: 2000 MHz @ – 10 dBm  
• Operating Supply Current: 4 mA Nominal at 3.0 V  
REF  
1
2
20  
19  
REF  
in  
out  
LD  
D
in  
• Operating Supply Voltage Range (V , V , V  
Pins): 2.7 to 5.5 V  
φ
3
18 CLK  
17 ENB  
16  
DD CC PD  
R
• Current Source/Sink Phase Detector Output:  
4
φ
V
V
PD  
1.7 mA @ 5.0 V or 1.0 mA @ 3.0 V  
5
Output A  
• Gain of Current Source/Sink Phase/Frequency Detector Controllable via  
15  
14  
6
PD  
Output B  
out  
Gnd  
Rx  
Serial Port  
7
V
DD  
• R Counter Division Range: 1 and 5 to 8191  
• Dual–Modulus Capability Provides Total Division up to 262,143  
• High–Speed Serial Interface: 4 Mbps  
8
13 Test 2  
9
12  
11  
V
CC  
Test 1  
f
in  
10  
f
in  
• Output A Pin, When Configured as Data Out, Permits Cascading of  
(Top View)  
Devices  
• Two General–Purpose Digital Outputs:  
Output A: Totem–Pole (Push–Pull) with Four Output Modes  
Output B: Open–Drain  
EVALUATION KIT  
• Patented Power–Saving Standby Feature with Orderly Recovery for  
Minimizing Lock Times, Standby Current: 30 µA  
The P/N MC145202–1EVK, which contains  
hardware and software, is available.  
• See App Note AN1253/D for Low–Pass Filter Design, and AN1277/D for  
Offset Reference PLLs for Fine Resolution or Fast Hopping  
ORDERING INFORMATION  
Operating  
BitGrabber and BitGrabber Plus are trademarks of Motorola, Inc.  
Temperature Range  
Device  
Package  
MC145202F1  
T
A
= –40 to 85°C  
SO–20  
Motorola, Inc. 2000  
Rev 1  
For More Information On This Product,  
Go to: www.freescale.com  
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