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MC145202DT

更新时间： 2024-11-02 22:58:11
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 信号电路锁相环或频率合成电路光电二极管
页数 文件大小 规格书
24页 346K
描述
Low-Voltage 2.0 GHz PLL Frequency Synthesizer

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中文翻译

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MC145202DT 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：TSSOP-20Reach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.72
其他特性：SELECTABLE 64/65 PRESCALER模拟集成电路 - 其他类型：PLL FREQUENCY SYNTHESIZER
JESD-30 代码：R-PDSO-G20JESD-609代码：e0
长度：6.5 mm功能数量：1
端子数量：20最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP20,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：NOT SPECIFIED电源：3/5 V
认证状态：Not Qualified座面最大高度：1.2 mm
子类别：PLL or Frequency Synthesis Circuits最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：2.7 V标称供电电压 (Vsup)：3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：4.4 mmBase Number Matches：1

MC145202DT 数据手册

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Order this document  
by MC145202/D  
SEMICONDUCTOR TECHNICAL DATA  
F SUFFIX  
SOG PACKAGE  
CASE 751J  
Includes On–Board 64/65 Prescaler  
20  
The MC145202 is a low–voltage single–package synthesizer with serial  
interface capable of direct usage up to 2.0 GHz.  
1
The counters are programmed via a synchronous serial port which is SPI  
compatible. The serial port is byte-oriented to facilitate control via an MCU. Due  
to the innovative BitGrabber Plus registers, the MC145202 may be cascaded  
with other peripherals featuring BitGrabber Plus without requiring leading  
dummy bits or address bits in the serial data stream. In addition, BitGrabber  
Plus peripherals may be cascaded with existing BitGrabber peripherals.  
The device features a single–ended current source/sink phase detector A  
output and a double–ended phase detector B output. Both phase detectors  
have linear transfer functions (no dead zones). The maximum current of the  
single–ended phase detector output is determined by an external resistor tied  
from the Rx pin to ground. This current can be varied via the serial port.  
DT SUFFIX  
TSSOP  
CASE 948D  
20  
1
ORDERING INFORMATION  
MC145202F  
SOG Package  
MC145202DT TSSOP  
PIN ASSIGNMENT  
Slew–rate control is provided by a special driver designed for the REF  
pin.  
out  
This minimizes interference caused by REF  
.
REF  
1
2
3
4
5
6
20  
19  
18  
17  
16  
15  
REF  
in  
out  
out  
LD  
This part includes a differential RF input that may be operated in a  
single–ended mode. Also featured are on–board support of an external crystal  
and a programmable reference output. The R, A, and N counters are fully  
programmable. The C register (configuration register) allows the part to be  
configured to meet various applications. A patented feature allows the C  
register to shut off unused outputs, thereby minimizing system noise and  
interference.  
D
in  
CLK  
φ
R
φ
V
ENB  
OUTPUT A  
OUTPUT B  
V
PD  
PD  
out  
In order to have consistent lock times and prevent erroneous data from being  
loaded into the counters, on–board circuitry synchronizes the update of the A  
register if the A or N counters are loading. Similarly, an update of the R register  
is synchronized if the R counter is loading.  
The double–buffered R register allows new divide ratios to be presented to  
the three counters (R, A, and N) simultaneously.  
GND  
Rx  
V
7
14  
13  
12  
11  
DD  
8
TEST 2  
TEST 1  
9
V
f
CC  
10  
f
in  
in  
•
•
•
•
•
Maximum Operating Frequency: 2000 MHz @ – 10 dBm  
Operating Supply Current: 4 mA Nominal at 3.0 V  
Operating Supply Voltage Range (V  
and V  
Pins): 2.7 to 5.5 V  
DD  
Operating Supply Voltage Range of Phase Detectors (V  
CC  
Pin): 2.7 to 5.5 V  
PD  
Current Source/Sink Phase Detector Output Capability: 1.7 mA @ 5.0 V  
1.0 mA @ 3.0 V  
•
Gain of Current Source/Sink Phase/Frequency Detector Controllable via  
Serial Port  
•
•
•
•
•
•
Operating Temperature Range: – 40 to + 85°C  
R Counter Division Range: 1 and 5 to 8191  
Dual–Modulus Capability Provides Total Division up to 262,143  
High–Speed Serial Interface: 4 Mbps  
OUTPUT A Pin, When Configured as Data Out, Permits Cascading of Devices  
Two General–Purpose Digital Outputs — OUTPUT A: Totem–Pole (Push–Pull)  
with Four Output Modes  
OUTPUT B: Open–Drain  
•
Patented Power–Saving Standby Feature with Orderly Recovery for  
Minimizing Lock Times, Standby Current: 30 µA  
Evaluation Kit Available (Part Number MC145202EVK)  
See Application Note AN1253/D for Low–Pass Filter Design, and  
AN1277/D for Offset Reference PLLs for Fine Resolution or Fast Hopping  
•
•
BitGrabber and BitGrabber Plus are trademarks of Motorola, Inc.  
REV 3  
1/98  
TN98012300  
Motorola, Inc. 1998  
1234567...24

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