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MC14503

更新时间： 2024-01-23 10:56:15
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA /
页数 文件大小 规格书
6页 214K
描述
Hex Non-Inverting 3-State Buffer

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MC14503 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
L SUFFIX  
CERAMIC  
CASE 620  
The MC14503B is a hex non–inverting buffer with 3–state outputs, and a  
high current source and sink capability. The 3–state outputs make it useful in  
common bussing applications. Two disable controls are provided. A high  
level on the Disable A input causes the outputs of buffers 1 through 4 to go  
into a high impedance state and a high level on the Disable B input causes  
the outputs of buffers 5 and 6 to go into a high impedance state.  
P SUFFIX  
PLASTIC  
CASE 648  
•
•
3–State Outputs  
TTL Compatible — Will Drive One TTL Load Over Full Temperature  
Range  
D SUFFIX  
SOIC  
CASE 751B  
•
•
•
Supply Voltage Range = 3.0 Vdc to 18 Vdc  
Two Disable Controls for Added Versatility  
Pin for Pin Replacement for MM80C97 and 340097  
ORDERING INFORMATION  
MAXIMUM RATINGS* (Voltages Referenced to V  
)
SS  
MC14XXXBCP  
MC14XXXBCL  
MC14XXXBD  
Plastic  
Ceramic  
SOIC  
Symbol  
Parameter  
DC Supply Voltage  
Value  
Unit  
V
V
– 0.5 to + 18.0  
DD  
V , V  
T
= – 55° to 125°C for all packages.  
A
Input or Output Voltage (DC or Transient)  
Input Current (DC or Transient), per Pin  
Output Current (DC or Transient), per Pin  
Power Dissipation, per Package†  
Storage Temperature  
– 0.5 to V  
DD  
+ 0.5  
V
in out  
I
in  
± 10  
mA  
mA  
mW  
C
I
± 25  
out  
TRUTH TABLE  
P
D
500  
Appropriate  
Disable  
T
stg  
– 65 to + 150  
260  
In  
Input  
Out  
T
L
Lead Temperature (8–Second Soldering)  
C
n
n
0
0
0
1
0
1
* Maximum Ratings are those values beyond which damage to the device may occur.  
†Temperature Derating:  
1
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C  
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C  
X
High  
Impedance  
CIRCUIT DIAGRAM  
X = Don’t Care  
ONE OF TWO/FOUR BUFFERS  
V
DD  
LOGIC DIAGRAM  
15  
12  
*IN  
n
OUT  
DISABLE B  
IN 5  
n
11  
OUT 5  
14  
2
13  
3
IN 6  
IN 1  
IN 2  
IN 3  
IN 4  
OUT 6  
OUT 1  
OUT 2  
OUT 3  
OUT 4  
*DISABLE  
*INPUT  
V
SS  
TO OTHER BUFFERS  
4
5
* Diode protection on all inputs (not shown)  
6
7
10  
9
This device contains protection circuitry to guard against damage  
due to high static voltages or electric fields. However, precautions must  
be taken to avoid applications of any voltage higher than maximum rated  
1
DISABLE A  
voltages to this high-impedance circuit. For proper operation, V and  
in  
V
V
= PIN 16  
= PIN 8  
V
out  
should be constrained to the range V  
SS  
≤ (V or V ) ≤ V .  
in out DD  
DD  
SS  
Unused inputs must always be tied to an appropriate logic voltage  
level (e.g., either V or V ). Unused outputs must be left open.  
SS DD  
REV 3  
1/94  
Motorola, Inc. 1995  
123456

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