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MC14106BFEL PDF预览

MC14106BFEL

更新时间: 2024-11-05 04:26:07
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
12页 113K
描述
IC,LOGIC GATE,HEX INVERTER,CMOS,SOP,14PIN,PLASTIC

MC14106BFEL 数据手册

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MC14516B  
Binary Up/Down Counter  
The MC14516B synchronous up/down binary counter is  
constructed with MOS P–channel and N–channel enhancement mode  
devices in a monolithic structure.  
This counter can be preset by applying the desired value, in binary,  
to the Preset inputs (P0, P1, P2, P3) and then bringing the Preset  
Enable (PE) high. The direction of counting is controlled by applying  
a high (for up counting) or a low (for down counting) to the  
UP/DOWN input. The state of the counter changes on the positive  
transition of the clock input.  
Cascading can be accomplished by connecting the Carry Out to the  
Carry In of the next stage while clocking each counter in parallel. The  
outputs (Q0, Q1, Q2, Q3) can be reset to a low state by applying a high  
to the reset (R) pin.  
http://onsemi.com  
MARKING  
DIAGRAMS  
16  
PDIP–16  
P SUFFIX  
CASE 648  
MC14516BCP  
AWLYYWW  
1
This CMOS counter finds primary use in up/down and difference  
counting. Other applications include: (1) Frequency synthesizer  
applications where low power dissipation and/or high noise immunity  
is desired, (2) Analog–to–digital and digital–to–analog conversions,  
and (3) Magnitude and sign generation.  
16  
SOIC–16  
D SUFFIX  
CASE 751B  
14516B  
AWLYWW  
1
Diode Protection on All Inputs  
16  
Supply Voltage Range = 3.0 Vdc to 18 Vdc  
Internally Synchronous for High Speed  
SOEIAJ–16  
F SUFFIX  
CASE 966  
MC14516B  
ALYW  
Logic Edge–Clocked Design — Count Occurs on Positive Going  
1
Edge of Clock  
Single Pin Reset  
Asynchronous Preset Enable Operation  
A
WL, L  
YY, Y  
= Assembly Location  
= Wafer Lot  
= Year  
Capable of Driving Two Low–Power TTL Loads or One Low–Power  
WW, W = Work Week  
Schottky Load Over the Rated Temperature Range  
ORDERING INFORMATION  
MAXIMUM RATINGS (Voltages Referenced to V ) (Note 2.)  
SS  
Device  
Package  
PDIP–16  
SOIC–16  
Shipping  
Symbol  
Parameter  
Value  
Unit  
V
MC14516BCP  
MC14516BD  
2000/Box  
48/Rail  
V
DD  
DC Supply Voltage Range  
–0.5 to +18.0  
V , V  
in out  
Input or Output Voltage Range  
(DC or Transient)  
–0.5 to V + 0.5  
V
DD  
MC14516BDR2  
SOIC–16 2500/Tape & Reel  
I , I  
Input or Output Current  
(DC or Transient) per Pin  
±10  
mA  
in out  
MC14516BF  
SOEIAJ–16  
SOEIAJ–16  
See Note 1.  
See Note 1.  
MC14516BFEL  
P
D
Power Dissipation,  
500  
mW  
1. For ordering information on the EIAJ version of  
the SOIC packages, please contact your local  
ON Semiconductor representative.  
per Package (Note 3.)  
T
Ambient Temperature Range  
Storage Temperature Range  
–55 to +125  
–65 to +150  
260  
°C  
°C  
°C  
A
T
stg  
This device contains protection circuitry to guard  
against damage due to high static voltages or electric  
fields. However, precautions must be taken to avoid ap-  
plications of any voltage higher than maximum rated  
voltages to this high–impedance circuit. For proper  
T
Lead Temperature  
(8–Second Soldering)  
L
2. Maximum Ratings are those values beyond which damage to the device  
may occur.  
3. Temperature Derating:  
operation, V and V should be constrained to the  
in  
out  
range V v (V or V ) v V  
.
SS  
in  
out  
DD  
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C  
Unused inputs must always be tied to an appropriate  
logic voltage level (e.g., either V or V ). Unused out-  
SS  
DD  
puts must be left open.  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
August, 2000 – Rev. 4  
MC14516B/D  

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