The MC14093B Schmitt trigger is constructed with MOS
P–channel and N–channel enhancement mode devices in a single
monolithic structure. These devices find primary use where low power
dissipation and/or high noise immunity is desired. The MC14093B
may be used in place of the MC14011B quad 2–input NAND gate for
enhanced noise immunity or to “square up” slowly changing
waveforms.
http://onsemi.com
MARKING
DIAGRAMS
14
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
PDIP–14
P SUFFIX
CASE 646
MC14093BCP
AWLYYWW
• Capable of Driving Two Low–Power TTL Loads or One Low–Power
Schottky TTL Load Over the Rated Temperature Range
• Triple Diode Protection on All Inputs
• Pin–for–Pin Compatible with CD4093
• Can be Used to Replace MC14011B
• Independent Schmitt–Trigger at each Input
1
14
SOIC–14
D SUFFIX
CASE 751A
14093B
AWLYWW
1
14
TSSOP–14
DT SUFFIX
CASE 948G
14
093B
ALYW
MAXIMUM RATINGS (Voltages Referenced to V ) (Note 2.)
SS
Symbol
Parameter
Value
Unit
V
1
V
DD
DC Supply Voltage Range
–0.5 to +18.0
14
1
V , V
Input or Output Voltage Range
(DC or Transient)
–0.5 to V + 0.5
V
in out
DD
SOEIAJ–14
F SUFFIX
CASE 965
MC14093B
AWLYWW
I , I
in out
Input or Output Current
(DC or Transient) per Pin
±10
mA
P
D
Power Dissipation,
500
mW
A
= Assembly Location
per Package (Note 3.)
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
T
Ambient Temperature Range
Storage Temperature Range
–55 to +125
–65 to +150
260
°C
°C
°C
A
T
stg
T
Lead Temperature
L
(8–Second Soldering)
ORDERING INFORMATION
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
Device
Package
PDIP–14
SOIC–14
Shipping
MC14093BCP
MC14093BD
2000/Box
2750/Box
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
MC14093BDR2
MC14093BDT
SOIC–14 2500/Tape & Reel
96/Rail
TSSOP–14
high–impedancecircuit. For proper operation, V and V should be constrained
in
out
to the range V
(V or V
)
V
.
SS
in
out
DD
MC14093BDTEL TSSOP–14 2000/Tape & Reel
MC14093BDTR2 TSSOP–14 2500/Tape & Reel
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either V or V ). Unused outputs must be left open.
SS
DD
MC14093BF
SOEIAJ–14
SOEIAJ–14
See Note 1.
See Note 1.
MC14093BFEL
1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.
Semiconductor Components Industries, LLC, 2000
1
Publication Order Number:
March, 2000 – Rev. 3
MC14093B/D