Datasheet > 逻辑 > 栅极> MC14075BCPS

MC14075BCPS

更新时间： 2024-11-04 13:11:15

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		栅
页数	文件大小	规格书
11页	330K
描述
OR Gate, CMOS, PDIP14

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中文翻译

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技术参数
数据手册

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MC14075BCPS 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
包装说明：	DIP, DIP14,.3	Reach Compliance Code：	unknown
风险等级：	5.92	JESD-30 代码：	R-PDIP-T14
JESD-609代码：	e0	逻辑集成电路类型：	OR GATE
端子数量：	14	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	DIP	封装等效代码：	DIP14,.3
封装形状：	RECTANGULAR	封装形式：	IN-LINE
电源：	5/15 V	认证状态：	Not Qualified
施密特触发器：	NO	子类别：	Gates
表面贴装：	NO	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	THROUGH-HOLE	端子节距：	2.54 mm
端子位置：	DUAL	Base Number Matches：	1

MC14075BCPS 数据手册

SEMICONDUCTOR TECHNICAL DATA

The B Series logic gates are constructed with P and N channel

enhancement mode devices in a single monolithic structure (Complemen-

tary MOS). Their primary use is where low power dissipation and/or high

noise immunity is desired.

•

Supply Voltage Range = 3.0 Vdc to 18 Vdc

All Outputs Buffered

Capable of Driving Two Low–power TTL Loads or One Low–power

Schottky TTL Load Over the Rated Temperature Range.

Double Diode Protection on All Inputs Except: Triple Diode Protection

on MC14011B and MC14081B

Pin–for–Pin Replacements for Corresponding CD4000 Series B Suffix

Devices (Exceptions: MC14068B and MC14078B)

•

L SUFFIX

CERAMIC

CASE 632

P SUFFIX

PLASTIC

CASE 646

D SUFFIX

SOIC

CASE 751A

ORDERING INFORMATION

MC14XXXBCP

MC14XXXBCL

MC14XXXBD

Plastic

Ceramic

SOIC

= – 55° to 125°C for all packages.

MAXIMUM RATINGS* (Voltages Referenced to V

)

Symbol

Parameter

DC Supply Voltage

Value

Unit

– 0.5 to + 18.0

V , V

Input or Output Voltage (DC or Transient)

– 0.5 to V

+ 0.5

in out

l , l

Input or Output Current (DC or Transient),

per Pin

± 10

in out

Power Dissipation, per Package†

Storage Temperature

500

stg

– 65 to + 150

260

Lead Temperature (8–Second Soldering)

* Maximum Ratings are those values beyond which damage to the device may occur.

†Temperature Derating:

Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C

Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C

This device contains protection circuitry to guard against damage

due to high static voltages or electric fields. However, precautions must

be taken to avoid applications of any voltage higher than maximum rated

voltages to this high-impedance circuit. For proper operation, V and

out

should be constrained to the range V

≤ (V or V ) ≤ V .

in out DD

Unused inputs must always be tied to an appropriate logic voltage

level (e.g., either V or V ). Unused outputs must be left open.

SS DD

REV 3

1/94

Motorola, Inc. 1995

MOTOROLA CMOS LOGIC DATA

MC14001B

12 3 4 5 6 7...11

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与MC14075BCPS相关器件

型号	品牌	获取价格	描述	数据表
MC14075BD	MOTOROLA	获取价格	B-Suffix Series CMOS Gates
MC14075BDCBS	MOTOROLA	获取价格	OR Gate, CMOS, CDIP14
MC14075BDR2	MOTOROLA	获取价格	4000/14000/40000 SERIES, TRIPLE 3-INPUT OR GATE, PDSO14, PLASTIC, SOIC-14
MC14076B	ONSEMI	获取价格	4-Bit D-Type Register with Three-State Outputs
MC14076B_05	ONSEMI	获取价格	4-Bit D-Type Register with Three-State Outputs
MC14076BAL	MOTOROLA	获取价格	4000/14000/40000 SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, CDIP16, 620-09
MC14076BCL	MOTOROLA	获取价格	4-Bit D-Type Register with Three-State Outputs
MC14076BCLD	MOTOROLA	获取价格	D Flip-Flop, 4000/14000/40000 Series, 1-Func, Positive Edge Triggered, 4-Bit, True Output,
MC14076BCLDS	MOTOROLA	获取价格	D Flip-Flop, 4000/14000/40000 Series, 1-Func, Positive Edge Triggered, 4-Bit, True Output,
MC14076BCLS	MOTOROLA	获取价格	D Flip-Flop, 4-Func, Positive Edge Triggered, CMOS, CDIP16

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