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MC14067B PDF预览

MC14067B

更新时间: 2024-01-27 20:24:44
品牌 Logo 应用领域
安森美 - ONSEMI 解复用器
页数 文件大小 规格书
12页 242K
描述
Analog Multiplexers/Demultiplexers

MC14067B 数据手册

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The MC14067 multiplexer/demultiplexer is a digitally controlled  
analog switch featuring low ON resistance and very low leakage  
current. This device can be used in either digital or analog  
applications.  
http://onsemi.com  
The MC14067 is a 16–channel multiplexer/demultiplexer with an  
inhibit and four binary control inputs A, B, C, and D. These control  
inputs select 1–of–16 channels by turning ON the appropriate analog  
switch (see MC14067 truth table.)  
MARKING  
DIAGRAMS  
24  
PDIP–24  
P SUFFIX  
CASE 709  
Low OFF Leakage Current  
MC14067BCP  
AWLYYWW  
Matched Channel Resistance  
Low Quiescent Power Consumption  
Low Crosstalk Between Channels  
Wide Operating Voltage Range: 3 to 18 V  
Low Noise  
1
24  
SOIC–24  
DW SUFFIX  
CASE 751E  
14067B  
AWLYYWW  
Pin for Pin Replacement for CD4067B  
1
A
= Assembly Location  
WL or L = Wafer Lot  
YY or Y = Year  
WW or W = Work Week  
MAXIMUM RATINGS (Voltages Referenced to V ) (Note 1.)  
SS  
Symbol  
Parameter  
Value  
Unit  
V
V
DD  
DC Supply Voltage Range  
– 0.5 to + 18.0  
V , V  
Input or Output Voltage Range  
(DC or Transient)  
– 0.5 to V + 0.5  
V
ORDERING INFORMATION  
in out  
DD  
Device  
Package  
PDIP–24  
SOIC–24  
Shipping  
I
in  
Input Current (DC or Transient),  
per Control Pin  
± 10  
mA  
MC14067BCP  
MC14067BDW  
MC14067BDWR2  
15/Rail  
30/Rail  
I
sw  
Switch Through Current  
± 25  
mA  
SOIC–24 1000/Tape & Reel  
P
D
Power Dissipation,  
500  
mW  
per Package (Note 2.)  
T
Ambient Temperature Range  
Storage Temperature Range  
– 55 to + 125  
– 65 to + 150  
260  
C
C
C
A
T
stg  
T
Lead Temperature  
L
(8–Second Soldering)  
1. Maximum Ratings are those values beyond which damage to the device  
may occur.  
2. Temperature Derating:  
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C  
This device contains protection circuitry to guard against damage due to high  
static voltages or electric fields. However, precautions must be taken to avoid  
applications of any voltage higher than maximum rated voltages to this  
high–impedancecircuit. For proper operation, V and V should be constrained  
in  
out  
to the range V  
(V or V  
)
V
DD  
.
SS  
in  
out  
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,  
either V or V ). Unused outputs must be left open.  
SS  
DD  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
March, 2000 – Rev. 3  
MC14067B/D  

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