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MC14052BDT

更新时间： 2024-02-21 07:09:49
品牌 Logo 应用领域
安森美 - ONSEMI 解复用器开关复用器或开关信号电路光电二极管
页数 文件大小 规格书
12页 170K
描述
Analog Multiplexers/Demultiplexers

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MC14052BDT 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：SOIC包装说明：SOP, SOP16,.3
针数：16Reach Compliance Code：unknown
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：5.11模拟集成电路 - 其他类型：DIFFERENTIAL MULTIPLEXER
JESD-30 代码：R-PDSO-G16JESD-609代码：e4
长度：10.2 mm湿度敏感等级：3
信道数量：4功能数量：1
端子数量：16标称断态隔离度：50 dB
通态电阻匹配规范：25 Ω最大通态电阻 (Ron)：1050 Ω
最高工作温度：125 °C最低工作温度：-55 °C
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP16,.3封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：260
电源：5/15 V认证状态：Not Qualified
座面最大高度：2.05 mm最大信号电流：0.025 A
子类别：Multiplexer or Switches最大供电电压 (Vsup)：18 V
最小供电电压 (Vsup)：3 V标称供电电压 (Vsup)：5 V
表面贴装：YES最长断开时间：600 ns
最长接通时间：600 ns切换：BREAK-BEFORE-MAKE
技术：CMOS温度等级：MILITARY
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：40宽度：5.275 mm
Base Number Matches：1

MC14052BDT 数据手册

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MC14051B, MC14052B,  
MC14053B  
Analog  
Multiplexers/Demultiplexers  
The MC14051B, MC14052B, and MC14053B analog multiplexers  
are digitally−controlled analog switches. The MC14051B effectively  
implements an SP8T solid state switch, the MC14052B a DP4T, and  
the MC14053B a Triple SPDT. All three devices feature low ON  
impedance and very low OFF leakage current. Control of analog  
signals up to the complete supply voltage range can be achieved.  
http://onsemi.com  
MARKING  
DIAGRAMS  
Features  
16  
1
• Triple Diode Protection on Control Inputs  
• Switch Function is Break Before Make  
MC1405xBCP  
AWLYYWWG  
PDIP−16  
P SUFFIX  
CASE 648  
1
• Supply Voltage Range = 3.0 Vdc to 18 Vdc  
• Analog Voltage Range (V − V ) = 3.0 to 18 V  
DD  
EE  
Note: V must be v V  
EE  
SS  
• Linearized Transfer Characteristics  
16  
1
• Low−noise − 12 nV/√Cycle, f ≥ 1.0 kHz Typical  
• Pin−for−Pin Replacement for CD4051, CD4052, and CD4053  
• For 4PDT Switch, See MC14551B  
1405xBG  
AWLYWW  
SOIC−16  
D SUFFIX  
CASE 751B  
1
• For Lower R , Use the HC4051, HC4052, or HC4053 High−Speed  
ON  
CMOS Devices  
• Pb−Free Packages are Available*  
16  
MAXIMUM RATINGS (Voltages Referenced to V  
)
SS  
14  
05xB  
ALYWG  
G
Symbol  
Parameter  
Value  
Unit  
TSSOP−16  
DT SUFFIX  
CASE 948F  
V
DC Supply Voltage Range  
−0.5 to +18.0  
V
DD  
1
(Referenced to V , V ≥ V )  
EE  
SS  
EE  
1
V ,  
Input or Output Voltage Range  
(DC or Transient) (Referenced to V for  
−0.5 to V + 0.5  
V
in  
out  
DD  
V
SS  
Control Inputs and V for Switch I/O)  
EE  
16  
1
I
Input Current (DC or Transient)  
per Control Pin  
+10  
mA  
in  
MC1405xB  
ALYWG  
SOEIAJ−16  
F SUFFIX  
CASE 966  
I
Switch Through Current  
25  
500  
mA  
mW  
°C  
SW  
1
P
T
Power Dissipation per Package (Note 1)  
Ambient Temperature Range  
D
−55 to +125  
−65 to +150  
260  
A
T
stg  
Storage Temperature Range  
°C  
x
A
= 1, 2, or 3  
= Assembly Location  
= Wafer Lot  
T
Lead Temperature (8−Second Soldering)  
°C  
L
WL, L  
Y
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
1. Temperature Derating: Plastic “P and D/DW” Packages: – 7.0 mW/_C From  
65_C To 125_C  
= Year  
WW, W = Work Week  
= Pb−Free Package  
(Note: Microdot may be in either location)  
G or G  
This device contains protection circuitry to guard against damage due to high  
static voltages or electric fields. However, precautions must be taken to avoid  
applications of any voltage higher than maximum rated voltages to this  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
high−impedance circuit. For proper operation, V and V should be constrained to  
in  
out  
the range V v (V or V ) v V  
.
SS  
in  
out  
DD  
dimensions section on page 9 of this data sheet.  
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either  
V
, V or V ). Unused outputs must be left open.  
SS EE  
DD  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
December, 2006 − Rev. 10  
MC14051B/D  
 
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