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MC14050BD

更新时间： 2024-11-03 22:58:11
品牌 Logo 应用领域
安森美 - ONSEMI 逻辑集成电路光电二极管输入元件
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8页 109K
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Hex Buffer

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MC14050BD 数据手册

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MC14049B, MC14050B  
Hex Buffer  
The MC14049B Hex Inverter/Buffer and MC14050B Noninverting  
Hex Buffer are constructed with MOS P−Channel and N−Channel  
enhancement mode devices in a single monolithic structure. These  
complementary MOS devices find primary use where low power  
dissipation and/or high noise immunity is desired. These devices  
http://onsemi.com  
MARKING  
provide logic level conversion using only one supply voltage, V  
.
DD  
The input−signal high level (V ) can exceed the V  
supply  
IH  
DD  
voltage for logic level conversions. Two TTL/DTL loads can be driven  
when the devices are used as a CMOS−to−TTL/DTL converter  
(V = 5.0 V, V v 0.4 V, I ≥ 3.2 mA).  
DIAGRAMS  
16  
1
DD  
OL  
OL  
PDIP−16  
P SUFFIX  
CASE 648  
MC140xxBCP  
AWLYYWW  
Note that pins 13 and 16 are not connected internally on these  
devices; consequently connections to these terminals will not affect  
circuit operation.  
Features  
16  
SOIC−16  
D SUFFIX  
CASE 751B  
• High Source and Sink Currents  
• High−to−Low Level Converter  
• Supply Voltage Range = 3.0 V to 18 V  
• V can exceed V  
140xxB  
AWLYWW  
1
IN  
DD  
• Meets JEDEC B Specifications  
• Improved ESD Protection On All Inputs  
• Pb−Free Packages are Available*  
16  
14  
0xxB  
ALYW  
TSSOP−16  
DT SUFFIX  
CASE 948F  
1
MAXIMUM RATINGS (Voltages Referenced to V  
)
SS  
Symbol  
Parameter  
Value  
Unit  
V
16  
1
V
DD  
DC Supply Voltage Range  
−0.5 to +18.0  
−0.5 to +18.0  
SOEIAJ−16  
F SUFFIX  
CASE 966  
V
Input Voltage Range (DC or Transient)  
V
MC140xxB  
AWLYWW  
in  
out  
V
Output Voltage Range (DC or Transient) −0.5 to V  
0.5  
+
V
DD  
I
Input Current (DC or Transient) per Pin  
Output Current (DC or Transient) per Pin  
±10  
±45  
mA  
mA  
mW  
in  
I
out  
xx  
A
WL, L  
YY, Y  
= Specific Device Code  
= Assembly Location  
= Wafer Lot  
P
Power Dissipation, per Package (Note 1)  
(Plastic)  
(SOIC)  
D
825  
740  
= Year  
WW, W = Work Week  
T
Ambient Temperature Range  
−55 to +125  
−65 to +150  
260  
°C  
°C  
°C  
A
T
stg  
Storage Temperature Range  
T
Lead Temperature (8−Second Soldering)  
L
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
1. Temperature Derating: See Figure 3.  
dimensions section on page 2 of this data sheet.  
This device contains protection circuitry to protect the inputs against damage  
due to high static voltages or electric fields referenced to the V pin only. Extra  
SS  
precautions must be taken to avoid applications of any voltage higher than the  
maximum rated voltages to this high−impedance circuit. For proper operation, the  
ranges V ≤ V ≤ 18 V and V ≤ V ≤ V are recommended.  
SS  
in  
SS  
out  
DD  
Unused inputs must always be tied to an appropriate logic voltage level  
(e.g., either V or V ). Unused outputs must be left open.  
SS  
DD  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
February, 2005 − Rev. 5  
MC14049B/D  
 
12345678

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MC14050BD 替代型号

型号 品牌 替代类型 描述 数据表
MC14050BDG ONSEMI

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