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MC14049BFEL PDF预览

MC14049BFEL

更新时间: 2024-11-03 22:25:43
品牌 Logo 应用领域
安森美 - ONSEMI 栅极触发器逻辑集成电路光电二极管
页数 文件大小 规格书
8页 109K
描述
Hex Buffer

MC14049BFEL 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:PLASTIC, EIAJ, SOP-16
针数:16Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.32
Is Samacsys:N系列:4000/14000/40000
JESD-30 代码:R-PDSO-G16JESD-609代码:e4
长度:10.2 mm负载电容(CL):50 pF
逻辑集成电路类型:INVERTER最大I(ol):0.006 A
湿度敏感等级:3功能数量:6
输入次数:1端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:5/15 V
Prop。Delay @ Nom-Sup:140 ns传播延迟(tpd):140 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:2.05 mm子类别:Gates
最大供电电压 (Vsup):18 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:5.275 mm
Base Number Matches:1

MC14049BFEL 数据手册

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MC14049B, MC14050B  
Hex Buffer  
The MC14049B Hex Inverter/Buffer and MC14050B Noninverting  
Hex Buffer are constructed with MOS P−Channel and N−Channel  
enhancement mode devices in a single monolithic structure. These  
complementary MOS devices find primary use where low power  
dissipation and/or high noise immunity is desired. These devices  
http://onsemi.com  
MARKING  
provide logic level conversion using only one supply voltage, V  
.
DD  
The input−signal high level (V ) can exceed the V  
supply  
IH  
DD  
voltage for logic level conversions. Two TTL/DTL loads can be driven  
when the devices are used as a CMOS−to−TTL/DTL converter  
(V = 5.0 V, V v 0.4 V, I 3.2 mA).  
DIAGRAMS  
16  
1
DD  
OL  
OL  
PDIP−16  
P SUFFIX  
CASE 648  
MC140xxBCP  
AWLYYWW  
Note that pins 13 and 16 are not connected internally on these  
devices; consequently connections to these terminals will not affect  
circuit operation.  
Features  
16  
SOIC−16  
D SUFFIX  
CASE 751B  
High Source and Sink Currents  
High−to−Low Level Converter  
Supply Voltage Range = 3.0 V to 18 V  
V can exceed V  
140xxB  
AWLYWW  
1
IN  
DD  
Meets JEDEC B Specifications  
Improved ESD Protection On All Inputs  
Pb−Free Packages are Available*  
16  
14  
0xxB  
ALYW  
TSSOP−16  
DT SUFFIX  
CASE 948F  
1
MAXIMUM RATINGS (Voltages Referenced to V  
)
SS  
Symbol  
Parameter  
Value  
Unit  
V
16  
1
V
DD  
DC Supply Voltage Range  
0.5 to +18.0  
0.5 to +18.0  
SOEIAJ−16  
F SUFFIX  
CASE 966  
V
Input Voltage Range (DC or Transient)  
V
MC140xxB  
AWLYWW  
in  
out  
V
Output Voltage Range (DC or Transient) −0.5 to V  
0.5  
+
V
DD  
I
Input Current (DC or Transient) per Pin  
Output Current (DC or Transient) per Pin  
±10  
±45  
mA  
mA  
mW  
in  
I
out  
xx  
A
WL, L  
YY, Y  
= Specific Device Code  
= Assembly Location  
= Wafer Lot  
P
Power Dissipation, per Package (Note 1)  
(Plastic)  
(SOIC)  
D
825  
740  
= Year  
WW, W = Work Week  
T
Ambient Temperature Range  
55 to +125  
65 to +150  
260  
°C  
°C  
°C  
A
T
stg  
Storage Temperature Range  
T
Lead Temperature (8−Second Soldering)  
L
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
1. Temperature Derating: See Figure 3.  
dimensions section on page 2 of this data sheet.  
This device contains protection circuitry to protect the inputs against damage  
due to high static voltages or electric fields referenced to the V pin only. Extra  
SS  
precautions must be taken to avoid applications of any voltage higher than the  
maximum rated voltages to this high−impedance circuit. For proper operation, the  
ranges V V 18 V and V V V are recommended.  
SS  
in  
SS  
out  
DD  
Unused inputs must always be tied to an appropriate logic voltage level  
(e.g., either V or V ). Unused outputs must be left open.  
SS  
DD  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
February, 2005 − Rev. 5  
MC14049B/D  
 

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