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MC14046BDWG PDF预览

MC14046BDWG

更新时间： 2024-02-07 16:07:29
品牌 Logo 应用领域
安森美 - ONSEMI 信号电路锁相环或频率合成电路光电二极管PC
页数 文件大小 规格书
8页 118K
描述
Phase Locked Loop

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中文翻译

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MC14046BDWG 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Obsolete零件包装代码：SOIC
包装说明：EIAJ, PLASTIC, SOIC-16针数：16
Reach Compliance Code：compliantHTS代码：8542.39.00.01
风险等级：7.9Is Samacsys：N
其他特性：IT CAN ALSO OPERATE AT 10V OR 15V NOMINAL模拟集成电路 - 其他类型：PHASE LOCKED LOOP
JESD-30 代码：R-PDSO-G16JESD-609代码：e4
长度：10.2 mm湿度敏感等级：3
功能数量：1端子数量：16
最高工作温度：125 °C最低工作温度：-55 °C
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP16,.3封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：260
电源：5/15 V认证状态：Not Qualified
座面最大高度：2.05 mm子类别：PLL or Frequency Synthesis Circuits
最大供电电压 (Vsup)：18 V最小供电电压 (Vsup)：3 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：40宽度：5.275 mm
Base Number Matches：1

MC14046BDWG 数据手册

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MC14046B  
Phase Locked Loop  
The MC14046B phase locked loop contains two phase comparators,  
a voltage−controlled oscillator (VCO), source follower, and zener  
diode. The comparators have two common signal inputs, PCA and  
in  
PCB . Input PCA can be used directly coupled to large voltage  
in  
in  
signals, or indirectly coupled (with a series capacitor) to small voltage  
signals. The self−bias circuit adjusts small voltage signals in the linear  
region of the amplifier. Phase comparator 1 (an exclusive OR gate)  
http://onsemi.com  
MARKING  
provides a digital error signal PC1 , and maintains 90° phase shift at  
out  
DIAGRAMS  
the center frequency between PCA and PCB signals (both at 50%  
in  
in  
16  
1
duty cycle). Phase comparator 2 (with leading edge sensing logic)  
provides digital error signals, PC2 and LD, and maintains a 0°  
PDIP−16  
P SUFFIX  
CASE 648  
MC14046BCP  
AWLYYWWG  
out  
phase shift between PCA and PCB signals (duty cycle is  
in  
in  
immaterial). The linear VCO produces an output signal VCO  
out  
whose frequency is determined by the voltage of input VCO and the  
in  
16  
capacitor and resistors connected to pins C1 , C1 , R1, and R2. The  
A
B
source−follower output SF with an external resistor is used where  
SOIC−16  
DW SUFFIX  
CASE 751G  
out  
14046BG  
AWLYYWW  
the VCO signal is needed but no loading can be tolerated. The inhibit  
in  
input Inh, when high, disables the VCO and source follower to  
minimize standby power consumption. The zener diode can be used to  
assist in power supply regulation.  
1
Applications include FM and FSK modulation and demodulation,  
frequency synthesis and multiplication, frequency discrimination,  
tone decoding, data synchronization and conditioning,  
voltage−to−frequency conversion and motor speed control.  
16  
SOEIAJ−16  
F SUFFIX  
CASE 966  
MC14046B  
ALYWG  
Features  
1
• Buffered Outputs Compatible with MHTL and Low−Power TTL  
• Diode Protection on All Inputs  
• Supply Voltage Range = 3.0 to 18 V  
A
WL, L  
YY, Y  
= Assembly Location  
= Wafer Lot  
= Year  
• Pin−for−Pin Replacement for CD4046B  
• Phase Comparator 1 is an Exclusive OR Gate and is Duty Cycle Limited  
• Phase Comparator 2 Switches on Rising Edges and is not Duty Cycle  
Limited  
WW, W = Work Week  
G
= Pb−Free Indicator  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
• Pb−Free Packages are Available*  
MAXIMUM RATINGS (Voltages Referenced to V  
)
SS  
Symbol  
Parameter  
Value  
−0.5 to +18.0  
Unit  
V
V
DC Supply Voltage Range  
Input Voltage Range (All Inputs)  
DC Input Current, per Pin  
This device contains protection circuitry to guard  
against damage due to high static voltages or electric  
fields. However, precautions must be taken to avoid ap-  
plications of any voltage higher than maximum rated  
voltages to this high−impedance circuit. For proper op-  
eration, V and V should be constrained to the range  
DD  
V
in  
−0.5 to V + 0.5  
V
DD  
I
10  
mA  
mW  
in  
P
Power Dissipation, per Package  
(Note 1)  
500  
D
in  
out  
V
v (V or V ) v V  
.
DD  
SS  
in  
out  
T
Operating Temperature Range  
Storage Temperature Range  
−55 to +125  
−65 to +150  
°C  
°C  
A
Unused inputs must always be tied to an appropriate  
logic voltage level (e.g., either V or V ). Unused out-  
puts must be left open.  
T
stg  
SS  
DD  
Maximum ratings are those values beyond which device damage can occur.  
Maximum ratings applied to the device are individual stress limit values (not  
normal operating conditions) and are not valid simultaneously. If these limits are  
exceeded, device functional operation is not implied, damage may occur and  
reliability may be affected.  
*For additional information on our Pb−Free strategy  
and soldering details, please download the  
ON Semiconductor Soldering and Mounting  
Techniques Reference Manual, SOLDERRM/D.  
1. Temperature Derating:  
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C  
©
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
August, 2005 − Rev. 10  
MC14046B/D  
 
12345678

中文翻译

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MC14046BDWG 替代型号

型号 品牌 替代类型 描述 数据表
MC14046BFG ONSEMI

完全替代

 PHASE LOCKED LOOP, 0.5MHz, PDSO16, EIAJ, PLASTIC, SOIC-16
MC14046BFELG ONSEMI

完全替代

 Phase Locked Loop
MC14046BDW ONSEMI

完全替代

 Phase Locked Loop

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