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MC14032BCL PDF预览

MC14032BCL

更新时间： 2024-09-22 22:58:11
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 运算电路逻辑集成电路
页数 文件大小 规格书
7页 253K
描述
Triple Serial Adders

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中文翻译

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MC14032BCL 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：DIP, DIP16,.3Reach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.85
Is Samacsys：N其他特性：SERIAL ADDER; CLEAR FOR CARRY ONLY; SYNCHRONOUS CLEAR
系列：4000/14000/40000JESD-30 代码：R-GDIP-T16
JESD-609代码：e0长度：19.49 mm
负载电容（CL）：50 pF逻辑集成电路类型：ADDER/SUBTRACTOR
位数：1功能数量：3
端子数量：16最高工作温度：125 °C
最低工作温度：-55 °C封装主体材料：CERAMIC, GLASS-SEALED
封装代码：DIP封装等效代码：DIP16,.3
封装形状：RECTANGULAR封装形式：IN-LINE
峰值回流温度（摄氏度）：NOT SPECIFIED电源：5/15 V
传播延迟（tpd）：1400 ns认证状态：Not Qualified
座面最大高度：5.08 mm子类别：Arithmetic Circuits
最大供电电压 (Vsup)：18 V最小供电电压 (Vsup)：3 V
标称供电电压 (Vsup)：5 V表面贴装：NO
技术：CMOS温度等级：MILITARY
端子面层：Tin/Lead (Sn/Pb)端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：7.62 mm
Base Number Matches：1

MC14032BCL 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
The MC14032B and MC14038B triple serial adders have the clock and  
carry reset inputs common to all three adders. The carry is added on the  
positive–going clock transition for the MC14032B, and on the negative–  
going clock transition for the MC14038B. Typical applications include serial  
arithmetic units, digital correlators, digital servo control systems, datalink  
computers, and flight control computers.  
L SUFFIX  
CERAMIC  
CASE 620  
•
•
•
•
Buffered Outputs  
Single–Phase Clocking  
Supply Voltage Range = 3.0 Vdc to 18 Vdc  
Capable of Driving Two Low–power TTL Loads or One Low–power  
Schottky TTL Load Over the Rated Temperature Range.  
Pin–for–Pin Replacement for CD4032B and CD4038B.  
P SUFFIX  
PLASTIC  
CASE 648  
D SUFFIX  
SOIC  
CASE 751B  
•
MAXIMUM RATINGS* (Voltages Referenced to V  
)
SS  
ORDERING INFORMATION  
Symbol  
Parameter  
DC Supply Voltage  
Value  
Unit  
V
MC14XXXBCP  
MC14XXXBCL  
MC14XXXBD  
Plastic  
Ceramic  
SOIC  
V
DD  
– 0.5 to + 18.0  
V , V  
Input or Output Voltage (DC or Transient)  
– 0.5 to V  
DD  
+ 0.5  
V
in out  
l , l  
T
= – 55° to 125°C for all packages.  
A
Input or Output Current (DC or Transient),  
per Pin  
± 10  
mA  
in out  
P
Power Dissipation, per Package†  
Storage Temperature  
500  
mW  
C
D
BLOCK DIAGRAM  
T
stg  
– 65 to + 150  
260  
A1 10  
B1 11  
T
Lead Temperature (8–Second Soldering)  
C
L
ADDER 1  
ADDER 2  
ADDER 3  
9 S1  
INVERT 1  
7
* Maximum Ratings are those values beyond which damage to the device may occur.  
†Temperature Derating:  
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C  
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C  
A2 13  
B2 12  
INVERT 2  
4 S2  
5
This device contains protection circuitry to guard against damage  
due to high static voltages or electric fields. However, precautions must  
be taken to avoid applications of any voltage higher than maximum rated  
V
V
= PIN 16  
DD  
= PIN 8  
SS  
voltages to this high-impedance circuit. For proper operation, V and  
A3 15  
B3 14  
INVERT 3  
in  
V
out  
should be constrained to the range V  
SS  
≤ (V or V ) ≤ V .  
in out DD  
1 S3  
Unused inputs must always be tied to an appropriate logic voltage  
level (e.g., either V or V ). Unused outputs must be left open.  
2
3
6
CLOCK  
SS DD  
CARRY RESET  
LOGIC DIAGRAMS  
(ONE SECTION AND COMMON INPUTS SHOWN)  
MC14032B  
MC14038B  
A
B
A
B
S
S
D
C
Q
D
C
Q
R
R
INVERT  
INVERT  
CARRY  
RESET  
CARRY  
RESET  
D
Q
D
C
Q
C
TO  
TO  
NEXT  
STAGE  
NEXT  
STAGE  
CLOCK  
CLOCK  
REV 3  
1/94  
Motorola, Inc. 1995  
1234567

中文翻译

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