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MC14013B

更新时间： 2024-11-12 22:58:11
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 触发器
页数 文件大小 规格书
6页 214K
描述
Dual Type D Flip-Flop

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中文翻译

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MC14013B 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
L SUFFIX  
CERAMIC  
CASE 632  
The MC14013B dual type D flip–flop is constructed with MOS P–channel  
and N–channel enhancement mode devices in a single monolithic structure.  
Each flip–flop has independent Data, (D), Direct Set, (S), Direct Reset, (R),  
and Clock (C) inputs and complementary outputs (Q and Q). These devices  
may be used as shift register elements or as type T flip–flops for counter and  
toggle applications.  
P SUFFIX  
PLASTIC  
CASE 646  
•
•
•
•
Static Operation  
Diode Protection on All Inputs  
Supply Voltage Range = 3.0 Vdc to 18 Vdc  
Logic Edge–Clocked Flip–Flop Design  
D SUFFIX  
SOIC  
CASE 751A  
Logic state is retained indefinitely with clock level either high or low;  
information is transferred to the output only on the positive–going edge  
of the clock pulse  
ORDERING INFORMATION  
•
•
Capable of Driving Two Low–power TTL Loads or One Low–power  
Schottky TTL Load Over the Rated Temperature Range  
Pin–for–Pin Replacement for CD4013B  
MC14XXXBCP  
MC14XXXBCL  
MC14XXXBD  
Plastic  
Ceramic  
SOIC  
T
A
= – 55° to 125°C for all packages.  
MAXIMUM RATINGS* (Voltages Referenced to V  
)
SS  
Symbol  
Parameter  
DC Supply Voltage  
Value  
Unit  
V
V
DD  
– 0.5 to + 18.0  
BLOCK DIAGRAM  
V , V  
Input or Output Voltage (DC or Transient)  
– 0.5 to V  
DD  
+ 0.5  
V
in out  
l , l  
6
Input or Output Current (DC or Transient),  
per Pin  
± 10  
mA  
in out  
S
5
3
D
C
Q
Q
1
2
P
D
Power Dissipation, per Package†  
Storage Temperature  
500  
mW  
C
T
stg  
– 65 to + 150  
260  
T
L
Lead Temperature (8–Second Soldering)  
C
R
* Maximum Ratings are those values beyond which damage to the device may occur.  
†Temperature Derating:  
4
8
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C  
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C  
S
R
9
D
C
Q
Q
13  
12  
TRUTH TABLE  
Inputs  
Outputs  
†
11  
10  
Clock  
Data  
Reset  
Set  
0
Q
Q
1
0
1
0
0
0
1
0
1
0
1
0
0
V
= PIN 14  
= PIN 7  
DD  
No  
Change  
X
X
X
X
0
Q
0
Q
1
V
SS  
X
X
X
0
1
1
0
1
1
1
X = Don’t Care  
† = Level Change  
REV 3  
1/94  
Motorola, Inc. 1995  
123456

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MC14013BCPDS MOTOROLA

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 		4000/14000/40000 SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, P

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