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MC14012BCPG PDF预览

MC14012BCPG

更新时间: 2024-11-04 04:59:35
品牌 Logo 应用领域
安森美 - ONSEMI
页数 文件大小 规格书
9页 150K
描述
B−Suffix Series CMOS Gates

MC14012BCPG 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:DIP
包装说明:DIP, DIP14,.3针数:14
Reach Compliance Code:unknownHTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:5.27
系列:4000/14000/40000JESD-30 代码:R-PDIP-T14
JESD-609代码:e3长度:18.86 mm
负载电容(CL):50 pF逻辑集成电路类型:NAND GATE
功能数量:2输入次数:4
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP14,.3
封装形状:RECTANGULAR封装形式:IN-LINE
包装方法:RAIL峰值回流温度(摄氏度):260
电源:5/15 VProp。Delay @ Nom-Sup:300 ns
传播延迟(tpd):300 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:4.69 mm
子类别:Gates最大供电电压 (Vsup):18 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:MILITARY端子面层:Matte Tin (Sn) - annealed
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:7.62 mmBase Number Matches:1

MC14012BCPG 数据手册

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MC14012B  
B−Suffix Series CMOS Gates  
The B Series logic gates are constructed with PChannel and  
NChannel enhancement mode devices in a single monolithic  
structure (Complementary MOS). Their primary use is where low  
power dissipation and/or high noise immunity is desired.  
http://onsemi.com  
Features  
Supply Voltage Range = 3.0 Vdc to 18 Vdc  
All Outputs Buffered  
MARKING  
DIAGRAMS  
Capable of Driving Two LowPower TTL Loads or One LowPower  
Schottky TTL Load Over the Rated Temperature Range  
Double Diode Protection on All Inputs  
PinforPin Replacements for Corresponding CD4000 Series B  
Suffix Devices  
14  
1
PDIP14  
P SUFFIX  
CASE 646  
MC14012BCP  
AWLYYWWG  
PbFree Packages are Available  
14  
SOIC14  
D SUFFIX  
CASE 751A  
14012BG  
AWLYWW  
MAXIMUM RATINGS (Voltages Referenced to V  
)
SS  
Symbol  
Parameter  
Value  
0.5 to +18.0  
Unit  
V
1
V
DC Supply Voltage Range  
DD  
V , V  
in out  
Input or Output Voltage Range  
(DC or Transient)  
0.5 to V + 0.5  
V
DD  
14  
SOEIAJ14  
F SUFFIX  
CASE 965  
MC14012B  
ALYWG  
I , I  
in out  
Input or Output Current  
(DC or Transient) per Pin  
±10  
mA  
P
Power Dissipation, per Package  
(Note 1)  
500  
mW  
D
1
T
Ambient Temperature Range  
Storage Temperature Range  
55 to +125  
65 to +150  
260  
°C  
°C  
°C  
A
WL, L  
YY, Y  
= Assembly Location  
= Wafer Lot  
= Year  
A
T
stg  
T
Lead Temperature  
WW, W = Work Week  
L
(8Second Soldering)  
G
= PbFree Package  
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
1. Temperature Derating:  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 2 of this data sheet.  
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C  
This device contains protection circuitry to guard against damage due to high  
static voltages or electric fields. However, precautions must be taken to avoid  
applications of any voltage higher than maximum rated voltages to this  
highimpedance circuit. For proper operation, V and V should be constrained  
in  
out  
to the range V v (V or V ) v V  
.
SS  
in  
out  
DD  
Unused inputs must always be tied to an appropriate logic voltage level  
(e.g., either V or V ). Unused outputs must be left open.  
SS  
DD  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
October, 2006 Rev. 7  
MC14012B/D  
 

MC14012BCPG 替代型号

型号 品牌 替代类型 描述 数据表
MC14012BDG ONSEMI

完全替代

B−Suffix Series CMOS Gates
MC14012BCP ONSEMI

类似代替

B-Suffix Series CMOS Gates
CD4012BE TI

功能相似

The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line cera

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