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MC14011UBCP

更新时间： 2024-11-03 22:10:31
品牌 Logo 应用领域
安森美 - ONSEMI 逻辑集成电路光电二极管栅
页数 文件大小 规格书
8页 125K
描述
UB-Suffix Series CMOS Gates

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中文翻译

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MC14011UBCP 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：DIP
包装说明：DIP, DIP14,.3针数：14
Reach Compliance Code：not_compliantHTS代码：8542.39.00.01
风险等级：7.64系列：4000/14000/40000
JESD-30 代码：R-PDIP-T14JESD-609代码：e0
长度：18.86 mm负载电容（CL）：50 pF
逻辑集成电路类型：NAND GATE功能数量：4
输入次数：2端子数量：14
最高工作温度：125 °C最低工作温度：-55 °C
封装主体材料：PLASTIC/EPOXY封装代码：DIP
封装等效代码：DIP14,.3封装形状：RECTANGULAR
封装形式：IN-LINE包装方法：RAIL
峰值回流温度（摄氏度）：NOT SPECIFIED电源：5/15 V
Prop。Delay @ Nom-Sup：180 ns传播延迟（tpd）：180 ns
认证状态：Not Qualified施密特触发器：NO
座面最大高度：4.69 mm子类别：Gates
最大供电电压 (Vsup)：18 V最小供电电压 (Vsup)：3 V
标称供电电压 (Vsup)：5 V表面贴装：NO
技术：CMOS温度等级：MILITARY
端子面层：Tin/Lead (Sn/Pb)端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：7.62 mm
Base Number Matches：1

MC14011UBCP 数据手册

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MC14001UB, MC14011UB  
UB−Suffix Series  
CMOS Gates  
The UB Series logic gates are constructed with P and N channel  
enhancement mode devices in a single monolithic structure  
(Complementary MOS). Their primary use is where low power  
dissipation and/or high noise immunity is desired. The UB set of  
CMOS gates are inverting non−buffered functions.  
http://onsemi.com  
MARKING  
Features  
DIAGRAMS  
• Supply Voltage Range = 3.0 Vdc to 18 Vdc  
• Linear and Oscillator Applications  
• Capable of Driving Two Low−Power TTL Loads or One  
Low−Power Schottky TTL Load Over the Rated Temperature Range  
• Double Diode Protection on All Inputs  
14  
1
PDIP−14  
P SUFFIX  
CASE 646  
MC140xxUBCP  
AWLYYWW  
• Pin−for−Pin Replacements for Corresponding CD4000 Series UB  
Suffix Devices  
14  
• Pb−Free Packages are Available*  
SOIC−14  
D SUFFIX  
CASE 751A  
140xxU  
AWLYWW  
MAXIMUM RATINGS (Voltages Referenced to V  
)
SS  
1
Symbol  
Parameter  
Value  
Unit  
V
V
DD  
DC Supply Voltage Range  
−0.5 to +18.0  
V , V  
Input or Output Voltage Range  
(DC or Transient)  
−0.5 to V + 0.5  
V
xx  
A
WL, L  
YY, Y  
= Specific Device Code  
= Assembly Location  
= Wafer Lot  
in out  
DD  
I , I  
in out  
Input or Output Current  
(DC or Transient) per Pin  
±10  
mA  
= Year  
WW, W = Work Week  
P
D
Power Dissipation, per Package  
(Note 1)  
500  
mW  
T
Ambient Temperature Range  
Storage Temperature Range  
−55 to +125  
−65 to +150  
260  
°C  
°C  
°C  
A
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
T
stg  
T
Lead Temperature  
L
(8−Second Soldering)  
Maximum ratings are those values beyond which device damage can occur.  
Maximum ratings applied to the device are individual stress limit values (not  
normal operating conditions) and are not valid simultaneously. If these limits are  
exceeded, device functional operation is not implied, damage may occur and  
reliability may be affected.  
1. Temperature Derating:  
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C  
This device contains protection circuitry to guard against damage due to high  
static voltages or electric fields. However, precautions must be taken to avoid  
applications of any voltage higher than maximum rated voltages to this  
high−impedance circuit. For proper operation, V and V should be constrained  
in  
out  
to the range V v (V or V ) v V  
.
SS  
in  
out  
DD  
Unused inputs must always be tied to an appropriate logic voltage level  
(e.g., either V or V ). Unused outputs must be left open.  
SS  
DD  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
February, 2005 − Rev. 5  
MC14001UB/D  
 
12345678

中文翻译

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MC14011UBCP 替代型号

型号 品牌 替代类型 描述 数据表
MC14093BCP ONSEMI

完全替代

 Quad 2-Input NAND Schmitt Trigger
MC14093BCPG ONSEMI

类似代替

 Quad 2−Input NAND Schmitt Trigger
MC14011BCPG ONSEMI

类似代替

 B-SUFFIX SERIES CMOS GATES

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