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MC14011BFL2 PDF预览

MC14011BFL2

更新时间： 2024-11-04 15:40:59
品牌 Logo 应用领域
安森美 - ONSEMI 栅输入元件光电二极管逻辑集成电路触发器
页数 文件大小 规格书
12页 261K
描述
IC,LOGIC GATE,QUAD 2-INPUT NAND,CMOS,SOP,14PIN,PLASTIC

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MC14011BFL2 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：SOP, SOP14,.3Reach Compliance Code：not_compliant
风险等级：5.92JESD-30 代码：R-PDSO-G14
JESD-609代码：e0负载电容（CL）：50 pF
逻辑集成电路类型：NAND GATE端子数量：14
最高工作温度：125 °C最低工作温度：-55 °C
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP14,.3封装形状：RECTANGULAR
封装形式：SMALL OUTLINE包装方法：TAPE AND REEL
电源：5/15 VProp。Delay @ Nom-Sup：250 ns
认证状态：Not Qualified施密特触发器：NO
子类别：Gates表面贴装：YES
技术：CMOS温度等级：MILITARY
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
Base Number Matches：1

MC14011BFL2 数据手册

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MC14001B, MC14011B, MC14023B,  
MC14025B, MC14071B, MC14073B,  
MC14081B, MC14082B  
http://onsemi.com  
The B Series logic gates are constructed with P and N channel  
enhancement mode devices in a single monolithic structure  
(Complementary MOS). Their primary use is where low power  
dissipation and/or high noise immunity is desired.  
MARKING  
DIAGRAMS  
14  
PDIP–14  
P SUFFIX  
CASE 646  
• Supply Voltage Range = 3.0 Vdc to 18 Vdc  
• All Outputs Buffered  
MC140XXBCP  
AWLYYWW  
• Capable of Driving Two Low–power TTL Loads or One Low–power  
Schottky TTL Load Over the Rated Temperature Range.  
• Double Diode Protection on All Inputs Except: Triple Diode  
Protection on MC14011B and MC14081B  
1
14  
SOIC–14  
D SUFFIX  
CASE 751A  
140XXB  
AWLYWW  
• Pin–for–Pin Replacements for Corresponding CD4000 Series B  
Suffix Devices  
1
14  
TSSOP–14  
DT SUFFIX  
CASE 948G  
14  
0XXB  
ALYW  
MAXIMUM RATINGS (Voltages Referenced to V ) (Note 1.)  
SS  
Symbol  
Parameter  
Value  
Unit  
V
V
DD  
DC Supply Voltage Range  
–0.5 to +18.0  
1
14  
1
V , V  
Input or Output Voltage Range  
(DC or Transient)  
–0.5 to V + 0.5  
V
in out  
DD  
SOEIAJ–14  
F SUFFIX  
CASE 965  
MC140XXB  
AWLYWW  
I , I  
in out  
Input or Output Current  
(DC or Transient) per Pin  
±10  
mA  
P
D
Power Dissipation,  
500  
mW  
XX  
A
= Specific Device Code  
= Assembly Location  
per Package (Note 2.)  
T
Ambient Temperature Range  
Storage Temperature Range  
–55 to +125  
–65 to +150  
260  
°C  
°C  
°C  
A
WL or L = Wafer Lot  
YY or Y = Year  
WW or W = Work Week  
T
stg  
T
Lead Temperature  
L
(8–Second Soldering)  
DEVICE INFORMATION  
1. Maximum Ratings are those values beyond which damage to the device  
may occur.  
Device  
Description  
2. Temperature Derating:  
MC14001B  
MC14011B  
MC14023B  
MC14025B  
MC14071B  
MC14073B  
Quad 2–Input NOR Gate  
Quad 2–Input NAND Gate  
Triple 3–Input NAND Gate  
Triple 3–Input NOR Gate  
Quad 2–Input OR Gate  
Triple 3–Input AND Gate  
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C  
This device contains protection circuitry to guard against damage due to high  
static voltages or electric fields. However, precautions must be taken to avoid  
applications of any voltage higher than maximum rated voltages to this  
high–impedancecircuit. For proper operation, V and V should be constrained  
in  
out  
to the range V  
(V or V  
in  
)
V
DD  
.
SS  
out  
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,  
either V or V ). Unused outputs must be left open.  
SS  
DD  
MC14081B  
MC14082B  
Quad 2–Input AND Gate  
Dual 4–Input AND Gate  
ORDERING INFORMATION  
Seedetailedorderingandshippinginformationinthepackage  
dimensions section on page 11 of this data sheet.  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
March, 2000 – Rev. 1  
MC14001B/D  
1234567...12

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